Develop Zynq-based applications through simulation and code generation
The Zynq ® Design Package makes it easier for you to program the Zynq platform. It provides a framework for integrated hardware/software design, simulation, and verification. This makes it easier to integrate Model-Based Design with MATLAB and Simulink (3:17) into your workflow, which enables fast design iteration cycles and helps you to detect and correct design and specification errors early.
The Zynq Design Package provides you with a guided workflow for hardware/software codesign including software interface modeling. It includes HDL and C code generation to eliminate hand coding errors and provide for rapid deployment on hardware.
A simple system implementing an up/down counter on the programmable logic (PL) inside Zynq is used to demonstrate the workflow. The processing system (PS) controls the speed and direction of the count. The top-level design is illustrated in figure 1. The example system videos to the right show how to run this system on a ZedBoard.
The Zynq Design Package contains:
- MATLAB® – Perform numerical computation, visualization, and programming in this high-level language and interactive environment
- Simulink® – Perform multidomain simulation and Model-Based Design in this block-diagram environment
- Fixed-Point Designer™ – Convert floating-point algorithms to fixed-point for FPGA implementation
- HDL Coder® – Generate readable, synthesizable VHDL® and Verilog® code from Simulink models, MATLAB functions, and Stateflow charts
- DSP System Toolbox™ – Generate algorithms for the design and simulation of signal processing systems
- Signal Processing Toolbox™ – Develop industry-standard algorithms and apps for analog and digital signal processing
- MATLAB Coder™ – Generate C and C++ code from MATLAB
- Simulink Coder™ – Generate and execute C and C++ code from Simulink diagrams, Stateflow® charts, and MATLAB functions
- Embedded Coder® – Generate readable, compact, and fast C and C++ code for use on embedded processors
Example System Videos:
The following videos highlight the steps required to get this example running on a ZedBoard featuring the Xilinx Zynq-7000 AP SoC.