Fujitsu engineers used Simulink® to model and simulate the SERDES chips and MATLAB® and Instrument Control Toolbox™ to automate testing of the hardware prototypes.
In order to simulate the large amounts of data passing through the system, they modeled the most complex subsystems in the SERDES design—the clock and data recovery (CDR) unit and the limiting amplifier (LA)—in Simulink.
The engineers used SPICE and other circuit emulators to simulate the individual analog blocks that make up the CDR and LA. They then abstracted the detailed results from the SPICE simulations into Simulink blocks to create a much faster, higher-level representation.
For example, to model jitter in the voltage controlled oscillator (VCO), the team first used advanced circuit analysis tools to simulate 1/f noise in each transistor and thermal noise in each resistor. In Simulink they created an ideal model of the VCO, inserted noise sources, and adjusted the noise level until the Simulink model produced results that matched the circuit-level simulations.
The engineers assembled complete models of the CDR and LA and then used Simulink to simulate the millions of cycles needed to gauge BER and assess the performance of nonlinear subsystems. The Simulink models ran much faster than the circuit-level models, enabling them to simulate millions of symbols in a reasonable time frame.
After laying out the integrated circuit, the engineers reran their circuit-level simulations using the post-layout netlist. They could then measure second-order parasitic capacitive and resistance effects not accounted for in the preliminary design. They incorporated these effects into the Simulink models and reran simulations before sending the design to be fabricated.
Design verification test engineers wrote MATLAB scripts to automate the testing process. Using Instrument Control Toolbox, they controlled signal generators and collected data from spectrum, vector network, and communication signal analyzers. The scripts were also used to control on-chip built-in BER test circuits.
Modeling engineers characterized individual devices such as inductors, varactors, and field-effect transistors (FETs) using MATLAB. The engineers used this data to further improve the accuracy of their simulations by refining the device models used by SPICE simulators.
The final SERDES ICs consume just 3.5 watts—well below the initial power goal of 4.5 watts.