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Cyclic Redundancy Check Encoding

Append CRC bits to a frame by building a g(x) = x³ + x + 1 generator polynomial using primitive Simulink® blocks and compare the results to the operation of the General CRC Generator block configured for the same generator polynomial.

For a known input message with a length of 6 bits, the model runs both CRC generators with a specific initial state of the register. The initial states are loaded into the workspace iniStates by using the PreLoadFcn callback function.

Running the simulation displays the appended CRC bits that are generated by using the General CRC Generator block and the CRC generated by using a generator polynomial built using primitive Simulink® blocks.

You can confirm the results of both implementations match with different message bits or with different initial states. To adjust the initial states, change the iniStates workspace variable prior to running the simulation. Other changes to the primitive block polynomial generator, such as specifying a higher order polynomial, require revising the layout of the primitive blocks. Whereas reconfiguring the General CRC Generator block requires updates to parameter settings only.