SM ST2C

Discrete-time or continuous-time synchronous machine ST2C static excitation system with an automatic voltage regulator

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  • Simscape / Electrical / Control / SM Control

Description

The SM ST2C block implements a synchronous-machine-type ST2C static excitation system model in conformance with IEEE 421.5-2016[1].

Use this block to model the control and regulation of the field voltage of a synchronous machine.

You can switch between continuous and discrete implementations of the block by using the Sample time (-1 for inherited) parameter. To configure the integrator for continuous time, set the Sample time (-1 for inherited) property to 0. To configure the integrator for discrete time, set the Sample time (-1 for inherited) property to a positive, nonzero value, or to -1 to inherit the sample time from an upstream block.

The SM ST2C block comprises four major components:

  • The Current Compensator modifies the measured terminal voltage as a function of the terminal current.

  • The Voltage Measurement Transducer simulates the dynamics of a terminal voltage transducer using a low-pass filter.

  • The Excitation Control Elements component compares the voltage transducer output with a terminal voltage reference to produce a voltage error. This voltage error is then passed through a voltage regulator to produce the field voltage.

  • The Power Source models the power source for the controlled rectifier when it is independent from the terminal voltage.

This diagram shows the overall structure of the ST2C excitation system model:

In the diagram:

  • VT and IT are the measured terminal voltage and current of the synchronous machine.

  • VC1 is the current-compensated terminal voltage.

  • VC is the filtered, current-compensated terminal voltage.

  • VREF is the reference terminal voltage.

  • VS is the power system stabilizer voltage.

  • VB is the exciter field voltage.

  • EFD and IFD are the field voltage and current, respectively.

The following sections describe each of the major parts of the block in detail.

Current Compensator and Voltage Measurement Transducer

The current compensator is modeled as:

VC1=VT+ITRC2+XC2,

where:

  • RC is the load compensation resistance.

  • XC is the load compensation reactance.

The voltage measurement transducer is implemented as a Low-Pass Filter block with the time constant TR. Refer to the documentation for the Low-Pass Filter block for the discrete and continuous implementations.

Excitation Control Elements

This diagram illustrates the overall structure of the excitation control elements:

In the diagram:

  • The Summation Point Logic subsystem models the summation point input location for the overexcitation limiter (OEL), underexcitation limiter (UEL), stator current limiter (SCL), and the power switch selector (V_S) voltages. For more information about using limiters with this block, see Field Current Limiters.

  • The Take-over Logic subsystem models the take-over point input location for the OEL, UEL, and SCL voltages. For more information about using limiters with this block, see Field Current Limiters.

  • The PI subsystem models a PI controller that functions as a control structure for the automatic voltage regulator and allows the representation of an equipment retrofit with a modern digital controller. The minimum and maximum anti-windup saturation limits for the block are VPImin and VPImax, respectively.

  • The Low-Pass Filter block models the major dynamics of the voltage regulator. Here, KA is the regulator gain and TA is the major time constant of the regulator. The minimum and maximum anti-windup saturation limits for the block are VRmin and VRmax, respectively.

  • The Filtered Derivative block models the rate feedback path for stabilization of the excitation system. Here, KF and TF are the gain and time constant of this system, respectively. Refer to the documentation for the Filtered Derivative block for the exact discrete and continuous implementations.

  • The Integrator block controls the exciter output through controlled saturation. The parameter EFDmax represents the limit on the exciter voltage. The time constant TE is associated with the inductance of the control windings.

Field Current Limiters

You can use various field current limiters to modify the output of the voltage regulator under unsafe operating conditions:

  • Use an overexcitation limiter to prevent overheating of the field winding due to excessive field current demand.

  • Use an underexcitation limiter to boost field excitation when it is too low, which risks desynchronization.

  • Use a stator current limiter to prevent overheating of the stator windings due to excessive current.

Attach the output of any of these limiters at one of these points:

  • The summation point as part of the automatic voltage regulator (AVR) feedback loop

  • The take-over point to override the usual behavior of the AVR

If you are using the stator current limiter at the summation point, use the single input VSCLsum. If you are using the stator current limiter at the take-over point, use both the overexcitation input, VSCLoel, and the underexcitation input, VSCLuel.

Power Source

Some static systems utilize both current and voltage sources to generate the power source.

This diagram shows a model of the exciter power source utilizing a phasor combination of the terminal voltage, VT, and terminal current, IT:

Ports

Input

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Voltage regulator reference set point, in per-unit representation, specified as a scalar.

Data Types: single | double

Input from the power system stabilizer, in per-unit representation, specified as a scalar.

Data Types: single | double

Terminal voltage magnitude in per-unit representation, specified as a scalar.

Data Types: single | double

Terminal current magnitude in per-unit representation, specified as a scalar.

Data Types: single | double

Input from the overexcitation limiter, in per-unit representation, specified as a scalar.

Dependencies

  • To ignore the input from the overexcitation limiter, set Alternate OEL input locations (V_OEL) to Unused.

  • To use the input from the overexcitation limiter at the summation point, set Alternate OEL input locations (V_OEL) to Summation point.

  • To use the input from the overexcitation limiter at the take-over point, set Alternate OEL input locations (V_OEL) to Take-over.

Data Types: single | double

Input from the underexcitation limiter, in per-unit representation, specified as a scalar.

Dependencies

  • To ignore the input from the underexcitation limiter, set Alternate UEL input locations (V_UEL) to Unused.

  • To use the input from the underexcitation limiter at the summation point, set Alternate UEL input locations (V_UEL) to Summation point.

  • To use the input from the underexcitation limiter at the take-over point, set Alternate UEL input locations (V_UEL) to Take-over.

Data Types: single | double

Input from the stator current limiter when using the summation point, in per-unit representation, specified as a scalar.

Dependencies

  • To ignore the input from the stator current limiter, set Alternate SCL input locations (V_SCL) to Unused.

  • To use the input from the stator current limiter at the summation point, set Alternate SCL input locations (V_SCL) to Summation point.

Data Types: single | double

Input from the stator current limiter that prevents field overexcitation when using the take-over point, in per-unit representation, specified as a scalar.

Dependencies

  • To ignore the input from the stator current limiter, set Alternate SCL input locations (V_SCL) to Unused.

  • To use the input from the stator current limiter at the take-over point, set Alternate SCL input locations (V_SCL) to Take-over.

Data Types: single | double

Input from the stator current limiter that prevents field underexcitation when using the take-over point, in per-unit representation, specified as a scalar.

Dependencies

  • To ignore the input from the stator current limiter, set Alternate SCL input locations (V_SCL) to Unused.

  • To use the input from the stator current limiter at the take-over point, set Alternate SCL input locations (V_SCL) to Take-over.

Data Types: single | double

Measured per-unit field current of the synchronous machine.

Data Types: single | double

Output

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Per-unit field voltage to to apply to the field circuit of the synchronous machine, returned as a scalar.

Data Types: single | double

Parameters

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General

Initial per-unit voltage to apply to the field circuit of the synchronous machine.

Initial per-unit terminal voltage.

Initial per-unit terminal current.

Time between consecutive block executions. During execution, the block produces outputs and, if appropriate, updates its internal state. For more information, see What Is Sample Time? (Simulink) and Specify Sample Time (Simulink).

For inherited discrete-time operation, specify -1. For discrete-time operation, specify a positive integer. For continuous-time operation, specify 0.

If this block is in a masked subsystem, or other variant subsystem that allows you to switch between continuous operation and discrete operation, promote the sample time parameter. Promoting the sample time parameter ensures correct switching between the continuous and discrete implementations of the block. For more information, see Promote Parameter to Mask (Simulink).

Pre-Control

Resistance used in the current compensation system. Set this parameter and Reactance component of load compensation, X_C (pu) to 0 to disable current compensation.

Reactance used in the current compensation system. Set this parameter and Resistive component of load compensation, R_C (pu) to 0 to disable current compensation.

Equivalent time constant for the voltage transducer filtering.

Control

Proportional gain associated with the voltage regulator PI control block.

Integral gain associated with the voltage regulator PI control block.

Maximum per-unit output voltage of the regulator PI control block.

Minimum per-unit output voltage of the regulator PI control block.

Gain associated with the voltage regulator.

Major time constant of the voltage regulator.

Rate feedback block gain.

Rate feedback block time constant.

Maximum per-unit output voltage of the regulator.

Minimum per-unit output voltage of the regulator.

Overexcitation limiter input location.

Underexcitation limiter input location.

Stator current limiter input location:

  • If you select Summation point, use the V_SCLsum input port.

  • If you select Take-over, use the V_SCLoel and V_SCLuel input ports.

Exciter

Rectifier loading factor proportional to the commutating reactance.

Proportional constant for the exciter field.

Time constant for exciter field.

Maximum per-unit generator field voltage value.

Per-unit voltage gain coefficient in the power source circuit.

Per-unit current gain coefficient in the power source circuit.

Per-unit reactance in the power source circuit.

Phase angle of the power source circuit, in degrees.

Maximum per-unit available exciter voltage value.

References

[1] IEEE Recommended Practice for Excitation System Models for Power System Stability Studies. IEEE Std 421.5-2016. Piscataway, NJ: IEEE-SA, 2016.

Extended Capabilities

C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.

See Also

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Introduced in R2020a