This example shows the steady-state and transient performance of a simple 500 MW (250 kV-2kA) HVDC transmission system.
A 500 MW (250 kV, 2 kA) DC interconnection is used to transmit power from a 315 kV, 5000 MVA AC network. The network is simulated by a LLR damped equivalent (impedance angle of 80 degrees at 60 Hz and 3rd harmonic). The converter transformer and the rectifier are modelled respectively with the Universal Transformer and Universal Bridge blocks The converter is a 6-pulse rectifier. It is connected to a 300 km distributed parameter line through a 0.5 H smoothing reactor LsR. The inverter is simulated by a simple DC voltage source in series with a diode (to force unidirectional conduction) and smoothing reactor LsI. The reactive power required by the converter is provided by a set of filters (C bank plus 5th, 7th and high pass filters; total 320 Mvar). Open the AC filter subsystem to see the filter topology. A circuit breaker facilitates the application of a DC line fault on the rectifier side.
Voltages sent to the synchronization system are filtered by 2nd order band pass filters. The whole control system is discretized (Sample time = 1/360/64 = 43.4 us).
The DC line current at the output of the rectifier is compared with a reference. The PI regulator tries to keep the error at zero and outputs the alpha firing angle required by the synchronizing unit. Inputs 3 and 4 of the current regulator allow to bypass the regulator action and to impose the alpha firing angle.
Notice that the system is discretized (sample time 1/360/64 = 43.4 us). Setting, the sample time in to zero, will change to continuous integration for the power system.
The system is programmed to start and reach a steady state. Then, a step is applied on the reference current to observe the dynamic response of the regulator. Finally a DC fault is applied on the line.
Start the simulation and observe the following events on Scope1 :
0 < t < 0.3 s
Trace 1 shows the reference current (magenta) and the measured Id current (yellow). The reference current is set to 0.5 pu (1 kA). The DC current starts from zero and reaches a steady-state in 0.1 s. Trace 2 shows the alpha firing angle required to obtain 0.5 pu of current (30 degrees).
0.3 < t < 0.5 s
At t = 0.3 s, the reference current is increased from 0.5 pu (1 kA) to the nominal current 1pu (2 kA). The current regulator responds in approximately 0.1 s (6 cycles). The alpha angle decreases from 30 degrees to 15 degrees.
0.5 < t < 0.55 s
At t = 0.5 s, a DC fault is applied on the line. The fault current ( trace 3) increases to 5 kA and the Id current increases to 2 pu (4 kA) in 10 ms. Then, the fast regulator action lowers the current back to its reference value of 1 pu.
0.55 < t <0.57 s
At t = 0.55 s, the alpha angle is forced by the protection system (not simulated) to reach 165 degrees when the Forced_alpha input of the current regulator goes high (1). The rectifier thus passes in inverter mode and sends the energy stored in the line back to the 345 kV network. As a result, the arc current producing the fault rapidly decreases. The fault is cleared at t = 0.555 s when the fault current zero crossing is reached.
0.57 < t < 0.8 s
At t = 0.57 s, the regulator is released and it starts to regulate the DC current again. The steady-state 1 pu current is reached at t = 0.75 s.
Frequency analysis of AC and DC voltages and currents
In order to allow further signal processing, signals displayed on Scope2 have been saved in a variable named 'psbvdc_str'(structure with time). These signals are: AC voltages(input 1), AC currents(input 2) and DC voltages on rectifier and line side of the smoothing reactor(input 3).
Open the Powergui and select 'FFT Analysis'. In the FFT window select structure 'psbhvdc_str'. The 0 - 2000 Hz FFT will be performed on a 2-cycle window starting at t = 0.8 - 2/60 (last 2 cycles of recording). Select input labeled 'Iabc'. By default Phase a current (signal number 1) is selected. Press on 'Display' and observe the frequency spectrum of AC current. Harmonic currents (order 6n+/-1 , n = 1,2,3, ...for a 6-pulse converter) are displayed in % of the fundamental component. If you analyze AC voltage (input Vabc) you should notice that the highest harmonics generated by the converter (5th and 7th) are filtered out by the two filters tuned at the 5th and 7th harmonics. Finally, select input labeled 'Vd VdL (pu)' and then input 1 or input 2. You will obtain harmonic content (order 6n) of the DC voltage Vd (rectifier side) or VdL (line side) expressed in % of the DC component.