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How Test Bench Verification Works

The Simulink® PLC Coder™ software simulates your model and automatically captures the input and output signals for the subsystem that contains your algorithm. This set of input and output signal data is the test bench data. The coder also automatically generates a test bench, or test harness, using the test bench data.

The test bench runs the generated code to verify that the output is functionally and numerically equivalent to the output from the execution of a Simulink model. The following table shows how the test bench compares the expected and actual data values.

Data TypeComparisonError Tolerance
integerabsolute0
booleanabsolute0
singlerelative0.0001
doublerelative0.00001

The relative tolerance comparison for single or double data types uses the following logic:

IF ABS(actual_value - expected_value) > (ERROR_TOLERANCE * expected_value) THEN
		testVerify := FALSE;
END_IF; 

To verify the generated code using the test bench, import the generated Structured Text and the test bench data into your target IDE. You can import test bench code:

  • Manually.

  • Automatically, including running the test bench.

For more information, see Import and Verify Structured Text Code.

Depending on the target IDE platform, the Simulink PLC Coder software generates code into one or more files. See Files Generated with Simulink PLC Coder for list of the target IDE platforms and the possible generated files.