Complexity Reduction

Manage nonlinearities, timer patterns, and scalability to improve analysis of complex models

Functions

`sldvtimer`	Identify, change, and display timer optimizations
`sldvextract`	Extract subsystem or subchart contents into new model for analysis

Sources of Model Complexity
Describes model characteristics that may complicate an analysis.
Bottom-Up Approach to Model Analysis
Explains the benefits of analyzing a model starting with low-level elements.
Large Models
An overview of techniques for analyzing large models.
Models with Large Verification State Space
Techniques to simplify the complexity of models with large verification state spaces.
Analyze a Large Model
Describes techniques for analyzing a large model.
Prove Properties in Large Models
Describes workflows and best practices for proving properties in large models.
Extract Subsystems for Analysis
Explains how subsystems and atomic subcharts are extracted for individual analysis.
Manage Model Data to Simplify the Analysis
Simplify your model to simplify the Simulink^® Design Verifier™ analysis.
Partition Model Inputs for Incremental Test Generation
As described in Constrain Data, you can constrain the values of model inputs using the Simulink Design Verifier Test Condition block.
Counters and Timers
Best practices for handling counters and timers in your model to avoid over complicating Simulink Design Verifier analysis.
Logical Operations
If you have a Simulink model with both logical and arithmetic operations, consider analyzing only the logical operations.
Increase Allocated Memory for Analysis Report Generation
Explains how to increase the amount of memory so the software can create reports for large models.