In the beginning of a project, use Simulink® Design Verifier™ to guide the design process as you build your model. Start by learning the analysis workflow, and run analysis progressively as your model grows. If you have an existing design in Simulink, see Component Selection.
- Basic Workflow for Simulink Design Verifier
Overview of the basic Simulink Design Verifier workflow.
- Generate Test Cases for a Subsystem
Analyze an individual subsystem.
- Analyze a Stateflow Atomic Subchart
Analyzing an atomic subchart using Simulink Design Verifier software.
- Analyze a Model
Analyzing a simple example model with Simulink Design Verifier.
- Analyze a Simple Model
Analyzing a simple model that demonstrates Simulink Design Verifier capabilities.
- Analyze a Large Model
Describes techniques for analyzing a large model.
- Analyze Export-Function Models
Analyzing an export-function models by using Simulink Design Verifier.
- Analyze an Export-Function Model with Global Simulink Function
Analyzing an export-function model with global Simulink function by using Simulink Design Verifier.
- Analyze AUTOSAR Component Models
Analyze AUTOSAR component models for the Classic Platform.
- Detect Design Errors in an AUTOSAR Software Component Model
Perform unit-testing to detect design errors in an AUTOSAR component.
Approximations Simulink Design Verifier performs before beginning its analysis.
- Reporting Approximations Through Validation Results
Describes how Simulink Design Verifier reports approximations through validation results.
- Logical Operations
If you have a Simulink model with both logical and arithmetic operations, consider analyzing only the logical operations.
- Logic Operations Short-Circuiting
Explains how Simulink Design Verifier short-circuits logic blocks.
- Modified Condition and Decision Coverage in Simulink Design Verifier
Describes the difference between MCDC coverage in Simulink Design Verifier and in Simulink Coverage™.
- Model Blocks
Analyzing Model blocks that reference external models.
- Block Reduction
Explains how Simulink reduces blocks during simulation and how it affects the Simulink Design Verifier analysis.
- Inlined Parameters
Optimize Simulink models by transforming tunable parameters into constant values.
- Nonfinite Data
Simulink Design Verifier does not support nonfinite data (for example,
Inf) and related operations.
- Large Models
An overview of techniques for analyzing large models.
- Sources of Model Complexity
Describes model characteristics that may complicate an analysis.
- Bottom-Up Approach to Model Analysis
Explains the benefits of analyzing a model starting with low-level elements.