soc.sdk.ProcessingSystem Class
Namespace: soc.sdk
Processing system definition in FPGACore
object
Description
Use the soc.sdk.ProcessingSystem
class to define the properties of a
processing system in an FPGA core in a soc.sdk.Hardware
object.
Creation
Description
creates an object that represents a processing system interface.processingSystemObj
= soc.sdk.ProcessingSystem(name
)
Properties
TCLFile
— Path to TCL file
''
(default) | character vector
Full path to the processing system TCL
file, specified as a
character vector.
Example: '$(TARGET_ROOT)/tcl/ZCU106PS.tcl'
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: char
ConstraintFile
— Path to constraint file
''
(default) | character vector
Full path to constraint file, specified as a character vector.
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: char
MasterInterfacePort
— Master interface port label
''
(default) | character vector
Master interface port label, specified as a character vector.
Example: 'zynq_ultra_ps/M_AXI_HPM0_FPD'
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: char
MasterInterfaceClockPort
— Master interface clock port label
''
(default) | character vector
Master interface clock port label, specified as a character vector.
Example: 'zynq_ultra_ps/maxihpm0_fpd_aclk'
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: char
MasterInterfaceResetPort
— Master interface reset port label
''
(default) | character vector
Master interface reset port label, specified as a character vector.
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: char
SlaveInterfacePort
— Slave interface port label
''
(default) | character vector
Slave interface port label, specified as a character vector.
Example: 'zynq_ultra_ps/S_AXI_HPC0_FPD'
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: char
SlaveInterfaceClockPort
— Slave interface clock port label
''
(default) | character vector
Slave interface clock port label, specified as a character vector.
Example: 'zynq_ultra_ps/saxihpc0_fpd_aclk'
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: char
SlaveInterfaceResetPort
— Slave interface reset port label
''
(default) | character vector
Slave interface reset port label, specified as a character vector.
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: char
InterruptInterfacePort
— Interrupt interface port label
''
(default) | character vector
Interrupt interface port label, specified as a character vector.
Example: 'zynq_ultra_ps/pl_ps_irq0'
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: char
SlaveInterfaceFrequencyMinMax
— Slave interface frequency range
[1 200]
(default) | two-element numeric vector
Minimum to maximum range of slave interface frequency, specified as a two-element numeric vector.
Example: [1 200]
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: double
FirstWriteLatencyMinMax
— Latency range of first data transfer
[0 100]
(default) | [min
max
]
min
max
]Specify first read latency as the number of clock cycles elapsed from the address
phase to the first data transfer for the memory controller transactions, specified as a
vector of the min
and the max
values. The default range is [0 100]
.
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: double
FirstWriteLatencyDefault
— Default value for first write transfer latency
max
(default) | value between FirstWriteLatencyMinMax
range
max
Specify the default value of the first write transfer latency between the
FirstWriteLatencyMinMax
range. When not specified, the default
value is the max
value of the range.
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: double
LastWriteLatencyMinMax
— Latency range of last data transfer
[0 100]
(default) | [min
max
]
min
max
]Specify the last write latency as the number of elapsed clock cycles from the last
data transfer to completion of the transaction, including any turn-around time,
specified as a vector of the min
and the
max
values. The default range is [0
100]
.
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: double
LastWriteLatencyDefault
— Default value of last write transfer latency
max
(default) | value between LastWriteLatencyMinMax
range
max
Specify the default value of the last write transfer latency between the
LastWriteLatencyMinMax
range. When not specified, the default
value is the max
value of the range.
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: double
FirstReadLatencyMinMax
— Latency range of the first data transfer
[0 100]
(default) | [min
max
]
min
max
]Specify the first read latency as the number of clock cycles elapsed from the
address phase to the first data transfer for the memory controller transactions,
specified as a vector of the min
and the
max
values. The default range is [0
100]
.
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: double
FirstReadLatencyDefault
— Default value of first read transfer latency
max
(default) | value between FirstReadLatencyMinMax
range
max
Specify the default value of first read latency between the
FirstReadLatencyMinMax
range. The default value is the
max
value of the range.
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: double
LastReadLatencyMinMax
— Latency range of last data transfer
[0 100]
(default) | [min
max
]
min
max
]Specify the last read latency range as the number of elapsed clock cycles from the
last data transfer to completion of the transaction, including any turn-around time, as
a vector consisting of the min
and the
max
values. The default range is [0
100]
.
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: double
LastReadLatencyDefault
— Default value of last read transfer latency
max
(default) | value between LastReadLatencyMinMax
range
max
Specify the default value of last read latency between the
LastReadLatencyMinMax
range. The default value is the
max
value of the range.
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: double
SlaveInterfaceDataWidth
— Slave interface data width
[32 64 128 256 512 1024]
(default) | numeric vector
Slave interface data width, specified as a numeric vector.
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: double
ClockOutputPort
— Clock output port label
non-empty character vector
Label of the clock output port connected to the FPGA, specified as a character vector.
Example: 'zynq_ultra_ps/pl_clk0'
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: char
ClockOutputFrequency
— Clock output frequency
positive scalar numeric value
Frequency of the clock output port connected to the FPGA, specified as a positive scalar numeric value.
Example: 100
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: double
ResetOutputPort
— Reset output port label
non-empty character vector
Label of the reset output port connected to the FPGA, specified as a character vector.
Example: 'zynq_ultra_ps/pl_resetn0'
Attributes:
GetAccess | public |
SetAccess | public |
Data Types: char
Version History
Introduced in R2019b
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