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Custom Board and Reference Design

Define and register custom reference design or custom board for Xilinx® FPGA.

HDL Coder™ can generate an IP core that you can deploy to the Xilinx FPGA boards. You can integrate the generated IP core into the default system reference design or into your own custom reference design that you can register for the board.

Classes

hdlcoder.BoardBoard registration object that describes SoC custom board
hdlcoder.ReferenceDesignReference design registration object that describes SoC reference design

Topics

Board and Reference Design Registration System (HDL Coder)

System for defining and registering boards and reference designs

Register a Custom Board (HDL Coder)

Define the interface and attributes of a custom SoC board. After defining the board, you can target it using the IP Core Generation Workflow in the HDL Workflow Advisor.

Register a Custom Reference Design (HDL Coder)

Define the interface and attributes of a custom SoC reference design. After defining and registering the reference design, you can target it using the IP Core Generation Workflow in the HDL Workflow Advisor.

Define Custom Parameters and Callback Functions for Custom Reference Design (HDL Coder)

Learn how to define custom parameters and custom callback functions for your custom reference design.

Define and Add IP Repository to Custom Reference Design (HDL Coder)

Learn how you can create an IP repository and add the IP modules in the repository to your custom reference design.

Related Information