Submitted
Vectorized Adaptive noise canceler using LMS filter
This demo shows to call external functions in an Embedded MATLAB block
9 years ago | 3 downloads |
Submitted
Bytes to Tuple converter
Using bitsliceget and bitconcat functions to implement a Byte2Tuple converter needed in a DVB system
9 years ago | 1 download |
Submitted
Enhanced and new bitwise operators in R2007b
This demo introduces new bitwise operators available in fixed point toolbox in R2007b
9 years ago | 1 download |
Submitted
Modelling registers in Embedded MATLAB
This example shows how to use Embedded MATLAB to model memory elements
9 years ago | 1 download |
Submitted
Modeling Mode Logic in Embedded MATLAB
Implementing Mealy and Moore FSMS in an Embedded MATLAB block
9 years ago | 1 download |
Submitted
A 32 point FFT in embedded MATLAB using fixed point arithmetic
The attached model implements a 32 point fft using embedded MATLAB and fixed point arithmetic
9 years ago | 1 download |
Submitted
DSP algorithms using Embedded MATLAB Block
using Embedded MATLAB block effectively in Simulink
9 years ago | 1 download |
Submitted
HDL Cookbook examples with Embedded MATLAB
Patterns and examples of various hardware elements implemented using Embedded MATLAB
9 years ago | 6 downloads |
Submitted
Cordic Implementation of Sin/Cos using embedded MATLAB
This model implements cordic algorithm using embedded MATLAB blocks
9 years ago | 3 downloads |
Answered
Matlab 2014b HDL coder, code generation failed.
Hello, Thank you for your question; we would like to investigate further on this issue and provide a workaround. Can you t...
Matlab 2014b HDL coder, code generation failed.
Hello, Thank you for your question; we would like to investigate further on this issue and provide a workaround. Can you t...
11 years ago | 0
Answered
Cannot find design 'main' on the path : HDL coder error
Can you tell us which version of MATLAB you are using? Thanks please make sure your project file (.prj) file is in the same f...
Cannot find design 'main' on the path : HDL coder error
Can you tell us which version of MATLAB you are using? Thanks please make sure your project file (.prj) file is in the same f...
11 years ago | 0
| accepted
Answered
about using HDL coder
can you attach your MATLAB design and testbench? please let us know what version of MATLAB you are using. thanks
about using HDL coder
can you attach your MATLAB design and testbench? please let us know what version of MATLAB you are using. thanks
11 years ago | 0
| accepted
Answered
How to avoid warnings regarding non-existent directory ?
Hi, I am not able to open the attachment. Based on your question, I recommend that you please check with Xilinx on this qu...
How to avoid warnings regarding non-existent directory ?
Hi, I am not able to open the attachment. Based on your question, I recommend that you please check with Xilinx on this qu...
11 years ago | 0
Answered
Using variable-size data with Unbuffer Block ?
I forwarded your question to our HDLVerifier team. Thanks
Using variable-size data with Unbuffer Block ?
I forwarded your question to our HDLVerifier team. Thanks
11 years ago | 0
Answered
HDL Code Generation "unhandled type"
you might have tried to generate code from the whole model. can you try this? makehdl('sfir_fixed/symmetric_fir')
HDL Code Generation "unhandled type"
you might have tried to generate code from the whole model. can you try this? makehdl('sfir_fixed/symmetric_fir')
11 years ago | 0
Answered
how to generate an "inout" port by Simulink HDL coder?
this should work. thanks % codegen -config:hdl -args {ufi(0,32,0),true,uint8(0)} read_or_load_ram function output = re...
how to generate an "inout" port by Simulink HDL coder?
this should work. thanks % codegen -config:hdl -args {ufi(0,32,0),true,uint8(0)} read_or_load_ram function output = re...
11 years ago | 0
Answered
how to generate an "inout" port by Simulink HDL coder?
In 2014a we have added support for INOUT ports in HDLCoder. Bidirectional port specification: You can specify bidirectiona...
how to generate an "inout" port by Simulink HDL coder?
In 2014a we have added support for INOUT ports in HDLCoder. Bidirectional port specification: You can specify bidirectiona...
11 years ago | 0
Answered
HDL Coder and LEC tools
Can you please contact technical support with specific issues? HDLCoder generates synthesizable HDL code (VHDL and Verilog) fro...
HDL Coder and LEC tools
Can you please contact technical support with specific issues? HDLCoder generates synthesizable HDL code (VHDL and Verilog) fro...
12 years ago | 0
Answered
Does HDL coder supports electrical blocks(tool boxes like power system,power electronics etc) to convert in to VHDL code? Please let me know which tool boxes it supports.
We would love to know more about this request. Can you please contact technical support on what additional blocks you would like...
Does HDL coder supports electrical blocks(tool boxes like power system,power electronics etc) to convert in to VHDL code? Please let me know which tool boxes it supports.
We would love to know more about this request. Can you please contact technical support on what additional blocks you would like...
12 years ago | 0
Answered
issue in HDL coding tutorial on Matlab R2012a
This is a known issue in R2012a and has been in subsequent releases.
issue in HDL coding tutorial on Matlab R2012a
This is a known issue in R2012a and has been in subsequent releases.
12 years ago | 0
Answered
HDL Coder IPCore Interface configuration scriptable?
There is no published API to script IP Core generation in Simulink. Please contact technical support for more info and planned e...
HDL Coder IPCore Interface configuration scriptable?
There is no published API to script IP Core generation in Simulink. Please contact technical support for more info and planned e...
12 years ago | 0
| accepted
Answered
How do I convert an unsigned integer to a signed integer without causing an overflow or using TYPECAST in Simulink 7.9 (R2012a)?
Use *reinterpretcast* to convert an unsigned number to signed number without causing overflow. The stored integer bits of the nu...
How do I convert an unsigned integer to a signed integer without causing an overflow or using TYPECAST in Simulink 7.9 (R2012a)?
Use *reinterpretcast* to convert an unsigned number to signed number without causing overflow. The stored integer bits of the nu...
12 years ago | 1
Answered
How to create a FFT ipcore for Zynq using Simulink HDL Coder?
Are you using "HDL FFT" or "HDL Streaming FFT" blocks shipping with HDLCoder? These support efficient HDL Code generation and us...
How to create a FFT ipcore for Zynq using Simulink HDL Coder?
Are you using "HDL FFT" or "HDL Streaming FFT" blocks shipping with HDLCoder? These support efficient HDL Code generation and us...
12 years ago | 0
Answered
Problems in converting Matlab code to VERILOG (HDL Coder)
Please contact technical support with the MATLAB code. Most likely you are running into an operation or function which is no...
Problems in converting Matlab code to VERILOG (HDL Coder)
Please contact technical support with the MATLAB code. Most likely you are running into an operation or function which is no...
12 years ago | 0
Answered
HDL code generation in matlab
Can you contact MathWorks support with your code and someone will help you resolve the issue?
HDL code generation in matlab
Can you contact MathWorks support with your code and someone will help you resolve the issue?
12 years ago | 0
Answered
HDL code generation problem
Can you give us more details? what error are you seeing that led you to believe you have an issue with fiaccel? Thanks.
HDL code generation problem
Can you give us more details? what error are you seeing that led you to believe you have an issue with fiaccel? Thanks.
12 years ago | 0
Answered
HDL Coder Example - Problem
The demo is trying to show that if you execute the following sequence of commands you will have a working directory with write p...
HDL Coder Example - Problem
The demo is trying to show that if you execute the following sequence of commands you will have a working directory with write p...
12 years ago | 0
Answered
System Generator y HDL coder
I used google translate on your message. "Good afternoon, I'm back working on the disne with FPGA and want to develop my proj...
System Generator y HDL coder
I used google translate on your message. "Good afternoon, I'm back working on the disne with FPGA and want to develop my proj...
13 years ago | 0
Answered
HDL Coder: PN Sequence Generator block fails path balancing, how to work around this?
hi andrew, can you share the model which reproduces the issue? thanks. kiran.kintali@mathworks.com
HDL Coder: PN Sequence Generator block fails path balancing, how to work around this?
hi andrew, can you share the model which reproduces the issue? thanks. kiran.kintali@mathworks.com
13 years ago | 0
Answered
About HDL simulink coder
Hi Pham, Can you send me the model that reproduce the failure? thanks. kiran.kintali@mathworks.com
About HDL simulink coder
Hi Pham, Can you send me the model that reproduce the failure? thanks. kiran.kintali@mathworks.com
13 years ago | 0
| accepted