Questa ADMS

Analog and mixed-signal simulator


  • Mixed-signal simulation for IC development
  • VHDL, Verilog, VHDL-AMS, and Verilog-AMS
  • Spice and Fast Spice
  • Integrated with Mentor and Cadence IC design environments
  • Import test cases from Simulink using Simulink Coder


Questa ADMS is a language-neutral simulator for the design and verification of multimillion gate analog and mixed-signal systems-on-a-chip. Users can perform mixed-signal, time-domain, RF, and frequency domain analysis. ADMS incorporates native support for the most popular electronic simulation languages. The ADMS target for Simulink Coder adds Simulink to the collection of modeling languages that ADMS supports.

Users can develop a model and its test environment in Simulink, and then transfer the Simulink model to ADMS in a single step. In the ADMS environment, users can simulate the system-level specification created in Simulink side-by-side with Spice or electronic HDL modules developed in ADMS. It is also easy to transfer a Simulink test fixture to ADMS to duplicate the stimulus used during development. ADMS Target for Simulink Coder provides the missing link in a complete system for silicon design flow.

Mentor, a Siemens Business

8005 SW Boeckman Rd
Wilsonville, OR 97070-7777
Tel: 800-547-3000
Fax: 503-685-7704

Required Products


  • Linux
  • UNIX
  • Windows


  • Consulting
  • E-mail
  • Fax
  • On-site assistance
  • Telephone
  • Training

Product Type

  • Modeling and Simulation Tools


  • Aerospace and Defense
  • Automotive
  • Communication Infrastructure
  • Consumer Electronics
  • Semiconductor