Design Verification with Simulink

This one-day course focuses on using Simulink Design Verifier to ensure that a design is devoid of possible design errors, is fully tested, and satisfies necessary requirements. Topics include:

  • Detecting and debugging common design errors
  • Collecting model coverage
  • Completing missing coverage using automatic test generation
  • Proving model properties for requirements-based verification
  • Handling model complexity for efficient analysis

See detailed course outline



Course Schedule

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Dates Location Language Price Register
30 Sep 2021 Virtual
9:00 am - 5:00 pm Central European Summer Time
Register today - only 1 seat(s) remaining
English USD 750
04 Nov 2021 Virtual
9:00 am - 5:00 pm US Eastern Daylight Time
English USD 750
23 Nov 2021 Virtual
9:00 am - 5:00 pm China Standard Time
Chinese USD 750
09 Dec 2021 Virtual
9:00 am - 5:00 pm Japan Standard Time
Japanese USD 750
Results 1 - 4 of 4

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