What Is PackML?

PackML or Packaging Machine Language defines a standard for programming automated machines, maintained by OMAC (Organization for Machine Automation and Control). PackML is part of the OMAC Packaging Workgroup.

When developing PackML compliant state machines, engineers usually have to check compliance with the standard periodically during the design process. While standard solutions for PackML support include only a template for developing IEC 61131-3 code, MathWorks expands support for PackML compliance with an integrated way to design, simulate, and test PackML compliant machine control software that:

  • Accelerates the creation by leveraging modeling templates
  • Ensures compliance through static checks
  • Targets different PLC platforms by using automatic code generation for IEC 61131-3 ST and ANSI/ISO C/C++

Figure 1: PackML State machine template

MathWorks capabilities for PackML compliant state machine design:
  • Templates for modeling PackML compliant state machines in Simulink and Stateflow
    An additional user interface ensures that the model remains
    • PackML compliant, meaning the state and transitions comply with the definitions in the standard
    • Enabled for Simulation in Simulink, providing the developers the ability to perform early and incremental validation
    • TestableSimulink Design Verifier is used to generate coverage-based test cases for the model, Simulink Test is used to execute and manage the test cases
    • Configured for automatic code generation, using Simulink Coder (C/C++) or Simulink PLC Coder (IEC 61131-3). The generated code conforms to PackTag and thus can be integrated seamlessly to other PackML compliant software.
  • Automated static checks ensuring PackML compliance
    Static checks are executed using Model Advisor and check the structural conformance of the modeled PackML state machine model. This includes propriety of states, transitions, state functions and interfaces. Thus manual reviews to ensure PackML compliance become obsolete.
  • Code generation for common PLC platforms using Simulink PLC Coder (IEC 61131-3 ST) or Simulink Coder (C/C++)
    The following PLC and Industrial PC platforms support code generation from Simulink:

Simulink PLC Coder is capable of generating a test bench from test cases used to verify the model to ensure the equivalent behavior of model and code.


Figure 2: All major PLC platforms support code generation from Simulink and Stateflow.

These capabilities enable Model-Based Design for developing PackML compliant state machines. Model-Based Design, through early verification, rapid prototyping and automatic code generation helps improving quality of the developed machine control software.

Software Reference

See also: PLC simulation, Virtual Commissioning