Verify AUTOSAR Code with SIL and PIL Simulations

As part of developing AUTOSAR software, you can carry out code verification of AUTOSAR software components by using software-in-the-loop (SIL) and processor-in-the-loop (PIL) simulations. Use SIL simulation for verification of generated source code on your development computer, and PIL simulation for verification of object code on your production target hardware. For more information, see Choose a SIL or PIL Approach (Embedded Coder).

Through behavioral and structural comparisons, code verification demonstrates the equivalence between a component model and its generated code. You can:

  • Test numerical equivalence between your component model and generated code by comparing normal mode simulation results against SIL or PIL simulation results.

  • Show the absence of unintended functionality by comparing model coverage against code coverage or performing a traceability analysis.

    • Configure SIL and PIL simulations to generate code coverage metrics.

    • Generate reports that provide bidirectional traceability between model objects and generated code.

SIL and PIL simulations are not supported for software component models configured for the AUTOSAR Adaptive Platform. You can run Model block SIL simulations with Code interface set to Model Reference for unit-level testing of Model blocks in an AUTOSAR software component model configured for system target file set to autosar_adaptive.tlc. In this case, the Model block under test can not reference a model mapped to an AUTOSAR software component.

For models configured for the AUTOSAR Classic Platform, you run SIL and PIL simulations by configuring either the top model or Model blocks.

  • You test AUTOSAR software component models that are configured for AUTOSAR system target file autosar.tlc by using the SIL/PIL Manager (Embedded Coder) and setting System Under Test to Top model and SIL/PIL Mode to Software-in-the-Loop (SIL) or Processor-in-the-Loop (PIL). Alternatively, you can reference the AUTOSAR software component model by using a Model block in a test harness model.

  • You use Model block SIL or PIL simulation for unit-level testing of a Model block that references an AUTOSAR software subcomponent model configured for AUTOSAR system target file autosar.tlc. On the Model block, set Simulation mode to Software-in-the-Loop (SIL) or Processor-in-the-Loop (PIL) and Code interface to Model reference. In this case, before you run a simulation, you must build the parent component to generate the AUTOSAR Runtime Environment (RTE) header files. If you do not build the parent component, the SIL or PIL simulation fails. For models configured for the AUTOSAR Classic Platform, you can build the subcomponent model by using the function slbuild and specify "ModelReferenceCoderTarget". For example,

    slbuild("autosar_subcomponent","ModelReferenceCoderTarget");
    For an example of a mapped AUTOSAR subcomponent referenced from an AUTOSAR software component, see Configure Subcomponent Data for AUTOSAR Calibration and Measurement.

  • For composition-level testing of multiple AUTOSAR software components, reference the component models in a composition, architecture model, or test harness model. In the Model block for each component under test, set Simulation mode to Software-in-the-Loop (SIL) or Processor-in-the-Loop (PIL), and set Code interface to Top model.

For more information, see Simulation with Top Model (Embedded Coder) and Simulation with Model Blocks (Embedded Coder).

If you have Simulink® Test™ software, you can use test harnesses to:

See Also

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