The deep learning on field programable gate array (FPGA) solution provides you with an end-to-end workflow to compile, deploy, profile and debug your custom pretrained deep learning networks. You can also generate a custom deep learning processor IP core that you can integrate into your custom reference design.
This figure shows the MATLAB® based deep learning on FPGA solution.
The workflow is:
Generate the external memory address map by using the
Retrieve the network layer latency and overall network performance in frames per second(FPS) by using the profiler and debugger.
Generate a custom deep learning processor IP core.
Integrate the generated IP core into your custom reference design.
Generate the external memory address map by using the compiler. Retrieve the network layer latency and overall network performance in frames per second (FPS) by using the profiler and debugger. Generate a custom deep learning processor IP core and integrate the generated IP core into your custom reference design.
FPGAs offer several advantages over a graphics processing unit (GPU) for deep learning applications.
High performance by providing high throughput and low latency.
Low power consumption by enabling you to fine-tune the hardware to your desired application.
Cost effective because you can integrate additional capabilities on the same chip, which also saves costs and board space.
Based on your goals, use the information in this table to choose your workflow.
|Run a pretrained series network on your target FPGA board.||Prototype Deep Learning Networks on FPGA and SoCs Workflow|
|Obtain the performance of your pretrained series network for a preconfigured deep learning processor.||Estimate Performance of Deep Learning Network|
|Customize the deep learning processor to meet your resource utilization requirements.||Estimate Resource Utilization for Custom Processor Configuration|
|Generate a custom deep learning processor for your FPGA.||Generate Custom Bitstream|
|Learn about the benefits of quantizing your pretrained series networks.||Quantization of Deep Neural Networks|
|Compare the accuracy of your quantized pretrained series networks against your single data type pretrained series network.||Validation|
|Run a quantized pretrained series network on your target FPGA board.||Code Generation and Deployment|