Code Optimization for HVX
R2026bGenerate optimized code for digital signal processing from blocks, System objects, and math operators using code replacement.
Qualcomm® Hexagon® processors require specific conditions to allow code replacement with the Hexagon Vector eXtension (HVX) for vector processors. You use this code replacement when generating C/C++ code from a model.
Blocks
 | HVX Conv2D | 2-D convolution for HVX (Since R2026a) |
 | HVX Dilate | 2-D grayscale dilation for HVX (Since R2026a) |
 | HVX Erode | 2-D grayscale erosion for HVX (Since R2026a) |
 | HVX FFT2 | 2-D fast Fourier transform using HVX (Since R2026b) |
 | HVX IFFT2 | 2-D inverse fast Fourier transform using HVX (Since R2026b) |
Objects
hexagon.hvx.FFT2 | 2-D fast Fourier transform using HVX (Since R2026b) |
hexagon.hvx.IFFT2 | 2-D inverse fast Fourier transform using HVX (Since R2026b) |
Functions
hexagon.hvx.conv2d | 2-D convolution for HVX (Since R2026a) |
hexagon.hvx.dilate3x3 | 2-D grayscale dilation with a 3-by-3 square structuring element for HVX (Since R2026a) |
hexagon.hvx.dilate5x5 | 2-D grayscale dilation with a 5-by-5 square structuring element for HVX (Since R2026a) |
hexagon.hvx.dilate7x7 | 2-D grayscale dilation with a 7-by-7 square structuring element for HVX (Since R2026a) |
hexagon.hvx.erode3x3 | 2-D grayscale erosion with a 3-by-3 square structuring element for HVX (Since R2026a) |
hexagon.hvx.erode5x5 | 2-D grayscale erosion with a 5-by-5 square structuring element for HVX (Since R2026a) |
hexagon.hvx.erode7x7 | 2-D grayscale erosion with a 7-by-7 square structuring element for HVX (Since R2026a) |
Topics
- Conditions for Code Replacement of DSP Blocks with HVX
Specify conditions for DSP blocks to allow code replacement with the Hexagon Vector Extension.
- Conditions for Code Replacement of DSP System Objects with HVX
Specify conditions for DSP System objects to allow code replacement with the Hexagon Vector Extension.
- Conditions for Code Replacement of MATLAB Functions with HVX
Specify conditions for MATLAB functions to allow code replacement with the Qualcomm Hexagon Vector eXtension library (HVX).
- Conditions for Code Replacement of Math Operators with HVX
Specific CRL conditions for math operators to allow code replacement with the Hexagon Vector Extension.
- Generate SIMD Code using Hexagon and HVX Instruction Set for Qualcomm Hexagon Processors
Learn how to generate SIMD code from MATLAB® functions using Hexagon and HVX instruction set for Qualcomm Hexagon processors. (Since R2026a)
Featured Examples
Getting Started with Embedded Coder Support Package for Qualcomm Hexagon Processors
Generate, verify, and profile the optimized code.
