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ADC Prescaler

Select the frequency of the clock, PCLK2, to ADC

Since R2024b

Model Configuration Pane: Hardware Implementation / Simulink or Embedded Coder Hardware Support Package / Hardware board settings / Target hardware resources / ADC Common

Description

The ADC Prescaler parameter allows the option to select the frequency of the clock, PCLK2, to ADC. PCLK2 is derived from system core clock and can have a maximum frequency of the clock as 84 MHz. When you select the clock core to ADC, the default value of frequency for ADC is set to 48 MHz (PCLK2 divided by 2)

Settings

PCLK2 divided by 2 (default) | PCLK2 divided by 4 | PCLK2 divided by 6 | PCLK2 divided by 8

The option to select the frequency of the clock, PCLK2, to ADC. PCLK2 is derived from system core clock and can have a maximum frequency of the clock as 84 MHz. When you select the clock core to ADC, the default value of frequency for ADC is set to 48 MHz (PCLK2 divided by 2).

Recommended Settings

No recommendation.

Programmatic Use

No programmatic use is available.

Version History

Introduced in R2024b

See Also

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