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Euler to NED Transformation HDL Optimized

Computes Euler to North-East-Down transformation using pipelined or burst architecture and generates optimized HDL code

  • Library:
  • Fixed-Point Designer HDL Support / Coordinate Transformations

  • Screenshot of Euler to NED Transformation HDL Optimized block

Description

The Euler to NED Transformation HDL Optimized block provides two architectures that implement Euler to North-East-Down (NED) transformation using a CORDIC rotation kernel for FPGA and ASIC applications.

You can select an architecture that optimizes for either throughput or area.

  • Pipelined — Use this architecture for high-throughput applications.

  • Burst — Use this architecture for a minimum resource implementation.

The Euler to NED Transformation HDL Optimized block provides hardware-friendly control signals.

Ports

Input

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Input array, specified as a 3-by-1 vector.

Fixed-point inputs must use binary-point scaling.

Example: UIn = [0;0;1]

Data Types: single | double | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | fixed point
Complex Number Support: Yes

Angles to rotate by, specified as a 3-by-1 real-valued vector containing the angles phi, theta, and psi in radians.

Example: AngleIn = [phi;theta;psi]

Data Types: single | double | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | fixed point

Whether input is valid, specified as a Boolean scalar. This control signal indicates when the data from the U In and Angle In input ports are valid. When this value is 1 (true), the block captures the values at the input ports U In and Angle In. When this value is 0 (false), the block ignores the input samples.

Data Types: Boolean

Whether to clear internal states, specified as a Boolean scalar. When this value is 1 (true), the block stops the current calculation and clears all internal states. When this value is 0 (false) and the Valid In value is 1 (true), the block begins a new subframe.

Data Types: Boolean

Output

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Rotated array, returned as a 3-by-1 vector.

Data Types: single | double | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | fixed point

Whether the output data is valid, returned as a Boolean scalar. When the value of this control signal is 1 (true), the block has successfully computed the output U Out. When this value is 0 (false), the output data is not valid.

Data Types: Boolean

Whether the block is ready for input, returned as a Boolean scalar. This control signal indicates when the block is ready for new input data. When this value is 1 (true) and Valid In value is 1 (true), the block accepts input data in the next time step. When this value is 0 (false), the block ignores input data in the next time step.

Data Types: Boolean

Parameters

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This parameter specifies the type of architecture.

  • Pipelined — Select this value to specify low-latency architecture.

  • Burst — Select this value to specify minimum resource architecture.

Programmatic Use

Block Parameter: Architecture
Type: character vector
Values: 'Pipelined' | 'Burst'
Default: 'Pipelined'

Algorithms

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Extended Capabilities

Fixed-Point Conversion
Design and simulate fixed-point systems using Fixed-Point Designer™.

Version History

Introduced in R2022b