Generate Cross-Platform DPI Components
Use DPI component generation to export a Simulink® subsystem to a C language component with a digital programming interface (DPI) for use in a Verilog® or SystemVerilog simulation. You can customize DPI generation for ModelSim® or Incisive® (Linux® only), or you can generate a generic DLL.
When you generate the component from a Windows® 64 host machine, you can also build the component libraries and run the simulation on a different operating system. If your target and host are not the same, you must port and build the shared libraries or HDL simulator projects manually. You cannot port a DPI component generated on a Linux machine to any other operating system.
Select Target Toolchain
When your target machine uses the same operating system as your host, you can select an installed compiler or request that the tools find a compiler automatically. If you want to generate a simulator project, or if you have no other compilers installed, select an HDL simulator for the same operating system as the host. However, if your target operating system is different from the host, you must select a target simulator and operating system.
Open your model, and on the Apps tab, click HDL Verifier. Then, on the HDL Verifier tab, click C Code Settings. The Configuration Parameters dialog opens on the Code Generation pane. The, under Toolchain settings, select a target Toolchain. This option specifies the target simulator and operating system where you run simulations. The supported cross-product toolchains are:
Mentor Graphics ModelSim/QuestaSim (64-bit Windows)(available from Windows host only)
Mentor Graphics ModelSim/QuestaSim (32-bit Windows)(available from Windows host only)
Cadence Incisive (64-bit Linux)
Cadence Incisive (32-bit Linux)
Mentor Graphics ModelSim/QuestaSim (64-bit Linux)
To build a shared library for a different operating system, you must select one of the simulator options. You can then build the library on your target machine.
Select Package code and artifacts. This option generates a
.zipfile so you can copy the generated files and build the component libraries on the target machine. You can optionally specify a name for this file. If you do not specify a name, it is named
On the configuration parameters, under Target Selection, for
System target file click Browse.
systemverilog_dpi_ert.tlc from the list.
To generate your component and an optional test bench, follow Generate SystemVerilog DPI Component from step 3 and on.
Copy to Target Machine
To use your generated component on a different operating system, you must copy the generated files to the new machine and build the libraries there.
Copy the generated
.zipfile from the host machine to the target machine. The
.zipfile is located in the same folder as your model. The makefile, ModelSim
.dofile, or Incisive
.shfile is included in the
Unzip the file into a folder of your choice. Flatten the folder structure when unzipping the files.
In Linux, enter this command:
unzip -j zipfile.zip
In Windows, when you unzip the files, clear the Use folder names check box.
When you generate the component on the host machine, the libraries are built for that operating system. To port the component to a different operating system, you must build the components manually on the target machine. To build your simulator project or generic shared library, find your target operating system and HDL simulator in the table and follow the instructions.
|Target Operating System||HDL Simulator||Build Instructions|
|Windows 32||Generic DLL||