Unit Delay External IC (Obsolete)

Delay signal one sample period, with external initial condition

Note

The Unit Delay External IC block is not recommended. This block was removed from the Discrete library in R2016b. In new models, use the Delay block (with parameters set appropriately). Existing models that contain the Unit Delay External IC block continue to work for backward compatibility.

Library

Additional Math & Discrete / Additional Discrete (until R2016b)

Description

The Unit Delay External IC block delays its input by one sample period. This block is equivalent to the z-1 discrete-time operator. The block accepts one input and generates one output, both of which can be scalar or vector. If the input is a vector, all elements of the vector are delayed by the same sample period.

The block's output for the first sample period is equal to the signal IC.

You specify the time between samples with the Sample time parameter. A setting of -1 means that the block inherits the Sample time.

Data Type Support

The Unit Delay External IC block accepts signals of the following data types:

  • Floating point

  • Built-in integer

  • Fixed point

  • Boolean

The data types of the inputs u and IC must be the same. The output has the same data type as u and IC.

For more information, see Data Types Supported by Simulink in the Simulink® documentation.

Parameters

Sample time

Specify the time interval between samples. To inherit the sample time, set this parameter to -1. See Specify Sample Time in the online documentation for more information.

Characteristics

Data Types

Double | Single | Boolean | Base Integer | Fixed-Point

Sample Time

Specified in the Sample time parameter

Direct Feedthrough

No, of the input port

Yes, of the external IC port

Multidimensional Signals

No

Variable-Size Signals

Yes

Zero-Crossing Detection

No

Code Generation

Yes

Introduced before R2006a