Enabled Subsystem

Subsystem whose execution is enabled by external input

• Library:

• Simulink / Ports & Subsystems

  HDL Coder / Ports & Subsystems

Description

The Enabled Subsystem block is a Subsystem block preconfigured as a starting point for creating a subsystem that executes when a control signal has a positive value.

Use Enable Subsystem blocks to model:

• Discontinuities

• Optional functionality

• Alternative functionality

Ports

Input

In — Signal input to a subsystem block

scalar | vector | matrix

Placing an Inport block in a subsystem block adds an external input port to the block. The port label matches the name of the Inport block.

Use Inport blocks to get signals from the local environment.

Data Types: single | double | int8 | int16 | int32 | uint8 | uint16 | uint32 | Boolean | fixed point | enumerated | bus

Enable — Control signal input to a subsystem block

scalar | vector | matrix

Placing an Enable block in a subsystem block adds an external input port to the block and changes the block to an Enable Subsystem block.

Data Types: single | double | int8 | int16 | int32 | uint8 | uint16 | uint32 | fixed point

Output

Out — Signal output from a subsystem

scalar | vector | matrix

Placing an Outport block in a subsystem block adds an output port from the block. The port label on the subsystem block is the name of the Outport block.

Use Outport blocks to send signals to the local environment.

Data Types: single | double | int8 | int16 | int32 | uint8 | uint16 | uint32 | Boolean | fixed point | enumerated | bus

Model Examples

Enabled Subsystems

What happens when a sine wave is fed into an enabled subsystem. After running the simulation, the scope shows three plots.

Open Model

Advanced Enabled Subsystems

What happens when a sine wave is fed into an enabled subsystem. The four subsystems in the model contain integrators, either discrete or continuous as described by the Subsystem name. After running the simulation, the two scopes show the results for the discrete enabled subsystems (top scope) and continuous enabled subsystems (bottom scope.)

Open Model

Illustration of Law of Large Numbers

Use MATLAB System blocks to illustrate the law of large numbers.

Open Model

Counters Using Conditionally Executed Subsystems

The contrast between enabled subsystems and triggered subsystems for the same control signal, through the use of counter circuits. After running the simulation, the scope shows three plots.

Open Model

Merging Signals

The following Simulink® concepts:

Open Model

Building a Clutch Lock-Up Model

Use Simulink® to model and simulate a rotating clutch system. Although modeling a clutch system is difficult because of topological changes in the system dynamics during lockup, this example shows how Simulink's enabled subsystems easily handle such problems. We illustrate how to employ important Simulink modeling concepts in the creation of the clutch simulation. Designers can apply these concepts to many models with strong discontinuities and constraints that may change dynamically.

Open Model

Block Characteristics

Data Types	Boolean[a] | bus[a] | double[a] | enumerated[a] | fixed point[a] | integer[a] | single[a] | string[a]
Direct Feedthrough	no
Multidimensional Signals	limited[a]
Variable-Size Signals	limited[a]
Zero-Crossing Detection	no
[a] Actual data type or capability support depends on block implementation.

Extended Capabilities

C/C++ Code Generation

Generate C and C++ code using Simulink® Coder™.

Actual code generation support depends on block implementation.

HDL Code Generation

Generate Verilog and VHDL code for FPGA and ASIC designs using HDL Coder™.

For more information about HDL code generation, see Enabled Subsystem.

PLC Code Generation
Generate Structured Text code using Simulink® PLC Coder™.

Fixed-Point Conversion

Convert floating-point algorithms to fixed point using Fixed-Point Designer™.

Actual data type support depends on block implementation.