Ensure Output Port Is Virtual

The software may add a hidden signal buffer before an Outport block in a conditional subsystem or before an Outport block at the top level of a model. In effect, the buffer is a Signal Copy block that does not appear on the canvas. This buffer ensures consistent initialization of the Outport block signal.

When a Merge block receives conditional output signals or partial-write signals as input, the hidden signal buffer might affect simulation results. To prevent the software from adding the buffer, select the Ensure outport is virtual block parameter of the related Outport block.

Merged Conditional Output Signals

Open Model

This example shows the effect of a hidden buffer that might be added between a conditional subsystem and an Outport block when the Ensure outport is virtual parameter of the Outport block is cleared.

Open the example model ex_conditional_write.

The Merge block combines its inputs into a signal whose value at any time is equal to the most recently computed output of its driving blocks.

The conditional subsystem named Enabled Subsystem A contains a conditional subsystem named Enabled Subsystem C that connects to an Outport block.

By default, the Ensure outport is virtual parameter of an Outport block is cleared. When the Ensure outport is virtual parameter of an Outport block is cleared:

The Outport block follows nonvirtual semantics.
The software might insert a hidden buffer to provide consistent initialization of the Outport block signal.

For most Outport blocks that connect to conditional subsystems, keep the Ensure outport is virtual parameter cleared.

Simulation with Hidden Buffer

In the example model, check that the Ensure outport is virtual parameter is cleared for the Outport block that connects to Enabled Subsystem C.

The software inserts a hidden buffer in Enabled Subsystem A between Enabled Subsystem C and the Outport block.

Simulation with a fixed-step solver produces these results.

Time 0: Enabled Subsystem A runs, but Enabled Subsystem C does not run. The buffer in Enabled Subsystem A runs and copies the initial value of zero to the Outport block. Enabled Subsystem B does not run. The merged signal is zero from the output of Enabled Subsystem A.
Time 0.5: Enabled Subsystem A does not run. Enabled Subsystem B runs and outputs a sine wave. The merged signal is the sine wave from Enabled Subsystem B.
Time 1: Enabled Subsystem A runs, but Enabled Subsystem C does not run. Again, the buffer in Enabled Subsystem A runs and copies the initial value of zero to the Outport block. Enabled Subsystem B does not run. The merged signal is the initial value from Enabled Subsystem A, not the last value from Enabled Subsystem B.

Simulation Without Hidden Buffer

Select the Ensure outport is virtual parameter of the Outport block that connects to Enabled Subsystem C.

When you select the Ensure outport is virtual parameter:

The Outport block follows virtual semantics.
The software does not insert a hidden buffer. If simulation needs a buffer before the Outport block, you receive an error.

Simulation with a fixed-step solver produces these results.

Time 0: Enabled Subsystem A runs, but Enabled Subsystem C does not run. Enabled Subsystem B does not run. The merged signal is the initial value of the signal.
Time 0.5: Enabled Subsystem A does not run. Enabled Subsystem B runs and outputs a sine wave. The merged signal is the value of the sine wave from Enabled Subsystem B.
Time 1: Enabled Subsystem A runs, but Enabled Subsystem C does not run. Enabled Subsystem B does not run. The merged signal is the most recently computed output, which is the sine wave from Enabled Subsystem B.

Merged Partial-Write Signals

Open Model

Suppose you want to initialize a vector and periodically update partial elements of the signal based on certain conditions or inputs. You can use a Merge block whose inputs are from two Function-Call Subsystem blocks. One subsystem provides the initialize task while the other subsystem provides a periodic-write task.

Open the example model ex_partial_write_single_merge.

The function-call subsystem named Initialize_Process_Subsystem is called once at the beginning of a simulation to initialize a vector.

The function-call subsystem named Run_Process_Subsystem is called to partially write to elements of the vector.

In Run_Process_Subsystem, the output from the Assignment block needs a path where a hidden buffer does not make copies of the vector. To remove a hidden buffer, select the Ensure outport is virtual parameter of the Outport block. If the software determines the buffer is needed, you receive an error.

The Initialize_Process_SubSystem:

Initializes each element of a 2 element vector with a value of 7.
Outputs the vector [7 7].

The Run_Process_Subsystem:

Inputs an index value of 1, but because the Index mode parameters of the Selector blocks is set to Zero-based, the Selector blocks select the second elements from the input vectors.
Adds the output scalar values from the Selector blocks for a result of 4.
Requires an output signal that is a vector with length 2 because the Assignment block Index mode parameter is set to Zero-based and the input index Idx1 is 1. After setting the Output size parameter to 2, the Assignment block is able to write to the second element.
Selects the Ensure outport is virtual parameter of the Outport block to remove the hidden buffer.

The Merge block outputs the vector [7 4].

Code generated from this model includes two functions, Init_Proc and Run_Proc.

/* Model step function */
void Init_Proc(void)
{
  int32_T s3_iter;

  /* Initialize signal vector elements with 7.0 */
  for (s3_iter = 0; s3_iter < 2; s3_iter++) {
    PartialWriteSingleMerge_DW.Assignment[s3_iter] = 7.0;
  }

  for (s3_iter = 0; s3_iter < 2; s3_iter++) {
    PartialWriteSingleMerge_Y.Out4[s3_iter] =
      PartialWriteSingleMerge_DW.Assignment[s3_iter];
  }
}

/* Model step function */
void Run_Proc(void)
{
/* Write to element 1 of the output signal vector */
  PartialWriteSingleMerge_Y.Out4[1] = 4.0;
}