Hardware Implementation Pane: ZCU102 or ZedBoard
R2026bConfigure hardware parameters for the AMD® Zynq® UltraScale+™ MPSoC ZCU102 Evaluation Kit or ZedBoard™ when using the Embedded Coder® feature set. These parameters enable code generation for rate-based tasks and basic profiling capabilities. To configure these parameters, follow these steps:
On the Simulink® toolstrip, on the Modeling tab, click Model Settings.
In the Configuration Parameter dialog box, click Hardware Implementation.
Set Hardware board to
Xilinx Zynq UltraScale+ MPSoC ZCU102 Evaluation KitorZedBoard. Click Apply.Set Feature set for selected hardware board to Embedded Coder. Click Apply.
The parameter values under Hardware board settings are automatically populated to their default values. You can optionally adjust these parameters for your particular use case.
Click Apply.
If you want to enable code generation for rate-based tasks and basic profiling capabilities for the ZC706 board, see Hardware Implementation Pane: AMD Zynq ZC706 Evaluation Kit.
If you want to enable code generation for rate-based and event-based tasks, as well as advanced profiling capabilities, set Feature set for selected hardware board to SoC Modeling and Generation. For information about configuring the associated hardware parameters for an AMD FPGA or SoC device, see Hardware Implementation Pane.
Operating System Options
| Parameter | Description |
|---|---|
Static priority of base rate task of Simulink model | |
Detection of failure to complete execution of current loop within current time step |
Board Parameters
| Parameter | Description |
|---|---|
| Device Address | Device IP address or host name of target hardware |
| Username | User name for operating system on target hardware |
| Password | User password for operating system on target hardware |
Build Options
| Parameter | Description |
|---|---|
Simulink Coder™ build operation for model |
Clocking
| Parameter | Description |
|---|---|
Frequency of the primary CPU core clock |
External Mode
| Parameter | Description |
|---|---|
Transport layer external mode uses to exchange data | |
Execution of external mode task in generated code within background thread | |
TCP/IP port number of target hardware | |
Verbose status messages for external mode execution progress and updates |
See Also
Hardware Implementation Pane: AMD Zynq ZC706 Evaluation Kit | Hardware Implementation Pane