Model Triangle Wave Generator Using Operational Amplifiers

This example shows how to model a triangle wave generator circuit by using two Band-Limited Op-Amp blocks. The first stage of the circuit represents a comparator constructed from an op-amp. Two Diode blocks model the Zener diodes that limit the output of the comparator to plus or minus 5 V. These limits result in a square wave.

The second stage of the circuit is an integrator. Integrating the square wave creates a triangle wave. The Sine Wave block modulates the waveform amplitude using the Variable Resistor block. To add a DC offset, specify the Constant voltage parameter of the DC Voltage Source block.

For more information about this example and to learn how to build this model, see Build and Simulate a Simple Circuit.

Open Model

Open the TriangleWaveGenerator model. This example parameterizes the two Band-Limited Op-Amp blocks based on an % LM7301 device. The LM7301 datasheet specifies these parameters:

• Gain is 97 dB, which is equivalent to a gain of 10^(97/20)=7.1e4. This model sets the Gain, A parameter of the two Band-Limited Op-Amp blocks to 7.1e4.

• Input resistance is 39e6 ohms. This model sets the Input resistance, Rin parameter of the two Band-Limited Op-Amp blocks to 39e6.

• Slew rate is 1.25 V per microsecond. This model sets the Maximum slew rate, Vdot parameter of the two Band-Limited Op-Amp blocks to 1.25e6.

• Bandwidth is 4 MHz. This model sets the Bandwidth, f parameter of the two Band-Limited Op-Amp blocks to 4e6.

• This model sets the Output resistance, Rout parameter of the two Band-Limited Op-Amp blocks to 0. The datasheet does not quote a value for Rout, but the term is insignificant compared to the output resistor that it drives.

View Simulation Results from Simscape Logging

This plot shows the output voltage of each stage for the triangle wave circuit. The comparator creates a square wave when the Zener diodes limit the output. Integrating this square wave produces a triangle wave. As the resistance of the Variable Resistor block increases, the amplitude of the output waveform increases and the frequency decreases.

Results from Real-Time Simulation

This example has been tested on a Speedgoat Performance real-time target machine with an Intel® 3.5 GHz i7 multi-core CPU. This model can run in real time with a step size of 40 microseconds.