Unknown change in result across add block

Hi,

I'm running a relatively simple model that has four cases, one of which will only every be true. When the case is false, it returns a zero value. These four cases are connected to an ADD block so that the answer, which comes from the only true case and is non-zero.

The problem I'm having is that the result from the one true case changes from one side of the add block to the other for no apparent reason!

Has anyone come across this before, or have any idea how to solve it?

Thanks in advance, Sean

Answer 1

[Andreas Goser]

This sounds like it could be a numerical issue related to signal data types / block data type setting. E.g. the add block could be set to some rounding or the block works in an unexpected way when you input logical.

You can also consider to use appropriate blocks from the "Logic and Bit Operations" library instead of the add block.

[Andreas Goser]

Sounds like a good guess. Next time, you could add a screenshot :-)