How i know the cause of an error when generate a test case in the Simulink design verifier?

Hi
How i know the cause of an error when generate a test case in the Simulink design verifier? I need this information to generate a coverage report if there aren't errors else i will specific the cause of the error of any model.
thnx
R.A

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Asked:

on 18 Mar 2013

Closed:

on 20 Aug 2021

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