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FPGA-in-the-Loopを使いFPGAでテストした出力の値がSimulinkモデルと一致しない
Simulinkでsubsystem１のモデルを作成した。その後、subsystem１のHDLコードをHDL Coderで生成し、FPGA-in-the-Loopを使いFPGAに実装した。Subsystem2のブロックとなる。しかし、Subsystem2の...
6 years ago | 1 answer | 0
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answerQuestion
対数積分の計算について,About Logarithmic integral function
対数積分の計算について li(-0.302303-4.46191i)を計算したいです。 Matlabの式に変換すると logint(-0.302303-4.46191i) となります。 予想される答えは -0.10538...
6 years ago | 1 answer | 0
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