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Custom Board and Reference Design

Define and register custom reference design or custom board for Microchip SoC device

HDL Coder™ can generate an IP core that you can deploy to the Microchip FPGA boards. You can integrate the generated IP core into the default system reference design or into your own custom reference design that you can register for the board.


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hdlcoder.BoardBoard registration object that describes SoC custom board
hdlcoder.WorkflowConfigConfigure HDL code generation and deployment workflows
hdlcoder.ReferenceDesignReference design registration object that describes SoC reference design


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addExternalIOInterfaceDefine external IO interface for board object
addExternalPortInterfaceDefine external port interface for board object
addInternalIOInterfaceAdd and define internal IO interface between generated IP core and existing IP cores
addAXI4SlaveInterfaceAdd and define AXI4 slave interface
addClockInterfaceAdd clock and reset interface
addCustomLiberoDesignSpecify Microchip Libero SoC exported block design Tcl file (Since R2022b)
addCustomMSSConfigImport microcontroller subsystem (MSS) in Microchip Libero Smart design (Since R2022b)
validateReferenceDesignCheck property values in reference design object
validateBoardCheck property values in board object