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HDL Code Generation

Generate HDL-compatible Simulink model for your plant model and generate HDL code

Generate HDL code for your plant model to deploy onto a target hardware platform. Use the sschdladvisor function to generate an HDL-compatible state-space model called an HDL implementation model. You can use HDL Coder™ to generate code for this model.

Before generating code, you can specify a single or double floating-point data type, or fixed-point data type for performing the matrix computations of your HDL algorithms. You can generate the logic to verify whether the generated HDL implementation model is functionally equivalent to your original Simscape™ model. For this logic you can also specify the tolerance value for the numerical correctness.

Functions

sschdladvisorOpen Simscape HDL Workflow Advisor
hdladvisorDisplay HDL Workflow Advisor
hdlsetuptoolpathSet up system environment to access FPGA synthesis software
makehdlGenerate HDL RTL code from model, subsystem, or model reference

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