Reciprocal

Implement control-signal-based reciprocal operation

Since R2020b

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Description

The Reciprocal block performs the reciprocal operation on the input data signal. The block has control signals that indicate whether the input and output data are valid. You can also specify the number of iterations of the algorithm and the latency strategy.

To use this block in your Simulink^® model, open the HDLMathLib library by entering this command in the MATLAB^® Command Window:

open_system("HDLMathLib")

Latency Considerations

You can simulate the Sqrt block with latency. This block is a masked subsystem that contains the LumpLatency MATLAB Function block. The subsystem uses this MATLAB Function block to compute the latency based on output data type. The latency of the block is calculated from word-length and fractional-length of fixed-point output.

The block supports four latency modes. You can specify a custom latency value by setting the Latency Strategy parameter to Custom.

To view the function that computes the latency of the block, open the LumpLatency block in the masked subsystem. To view inside the mask, click the ⇩ icon on the block. For more information, see Lump Latency for Reciprocal Block.

Examples

Implement Reciprocal Block with Control Signals

Implement the control-signal based Reciprocal block and use it to generate HDL code.

• Open Script

Limitations

The block has following HDL code generation limitations:

• The block does not support floating-point data types, such as half, single, and double.

• Bus type inputs are not supported.

• Cannot be used in Synchronous Subsystem.

• Does not support resource sharing optimization.

Ports

Input

dataIn — Data input signal

scalar

Data input to calculate the reciprocal.

Data Types: int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | Boolean | fixed point

validIn — Indication of whether input control signal is valid

scalar

Input control signal that indicates whether the input signal is valid.

Data Types: Boolean

Output

dataOut — Output data signal

scalar

Output signal that is the reciprocal of the input signal.

Data Types: int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | Boolean | fixed point

validOut — Indication of whether output control signal is valid

scalar

Output control signal that indicates whether output signal is valid.

Data Types: Boolean

Parameters

Latency strategy — Latency strategy

Max (default) | Min | Custom | Zero

Specify whether to map the blocks in your design to minimum, maximum, custom, or zero latency. For more information, see LatencyStrategy.

Programmatic Use

Block Parameter: latencyMode

Type: character vector

Values: 'Max' | 'Min''Custom' | 'Zero'

Default: 'Max'

Custom latency — Custom latency value

0 (default)

When you set Latency strategy to Custom, use this parameter to specify the custom latency value. The latency must be a nonnegative integer in the range [0, L], where L is the maximum latency value of Reciprocal block. For more information, see CustomLatency.

Dependency

To use this parameter, set Latency strategy to Custom.

Programmatic Use

Block Parameter: customLatencyValue

Type: Integer

Values: 0 to Max latency

Default: 0

Output data type — Output data type

Inherit: Inherit via internal rule (default) | Inherit: Same as first input | Inherit: Inherit via back propagation | int8 | uint8 | int16 | uint16 | int32 | uint32 | int64 | uint64 | fixdt(1,16) | fixdt(1,16,0) | <data type expression>

Specify the output data type. The data type can be inherited or specified directly.

Programmatic Use

Block Parameter: OutDataTypeStr

Type: character vector

Values: 'Inherit: Inherit via internal rule' | 'Inherit: Inherit via back propagation' | 'Inherit: Same as first input' | 'int8' | 'uint8' | int16 | 'uint16' | 'int32' | 'uint32' | 'int64' | 'uint64' | fixdt(1,16,0) | '<data type expression>'

Default: 'Inherit: Inherit via internal rule'

Tips

The block supports HDL code generation using HDL Coder™. HDL Coder provides additional configuration options that affect HDL implementation and synthesized logic. For more information, see HDL Block Properties.

Algorithms

Lump Latency for Reciprocal Block

The software uses the LumpLatency MATLAB Function block to compute the latency of the reciprocal operation. The block has four latency modes: Min, Max, Custom, and Zero. For more information, see LatencyStrategy and CustomLatency.

Latency Strategy	Latency Value
Max	The software calculates the latency L by using this equation: L = N + 4, where N is number of iterations. The software determines the value of N by using the fixed-point input and output data type.
Min	When the output data type is not a custom type, the software calculates the value of L using this equation: L = 2 + ceil( N / 3). When the output data type is a custom type, the software calculates the value of L using this equation: L = 3 + ceil( (N - 1) / 3), where N is number of iterations. The software determines the value of N by using the fixed-point input and output data type.
Custom	Specify the latency value for the block by entering the value between zero and maximum latency in the Custom latency parameter.
Zero	The latency of the block is 0.

The software calculates the value of N using the signedness, word length, and fractional length of the fixed-point input and output. The calculation depends on the conditions in this table.

Conditions			Number of Iterations (N)
OutputWL is greater than or equal to InputWL	abs(FractionSum) is less than OutputWL	abs(FractionSum) + 1 is equal to OutputWL	OutputWL + 1
		abs(FractionSum) + 1 is not equal to OutputWL	OutputWL
	abs(FractionSum) is greater than or equal to OutputWL	Output is signed	abs(FractionSum) + 2
		Output is unsigned	abs(FractionSum) + 1
OutputWL is less than InputWL	abs(FractionSum) is less than InputWL	abs(FractionSum) + 1 is equal to InputWL	InputWL + 1
		abs(FractionSum) + 1 is not equal to InputWL	InputWL
	abs(FractionSum) is greater than or equal to InputWL	Output is signed	abs(FractionSum) + 2
		Output is unsigned	abs(FractionSum) + 1

Where OutputWL is an output word length and InputWL is an input word length. Fractional length sum FractionSum is the sum of the input fractional length InputFL and output fractional length OutputFL.

When the output data type is a custom type, the software adds one more iteration to the number of iterations it calculates in accordance with the table. To determine whether the output data type is a custom type, these conditions must be true:

• InputWL is not equal to OutputWL.

• Input signedness is not equal to output signedness.

• OutputFL is not equal to (InputWL - InputFL - 2) for signed input. OutputFL is not equal to (InputWL - InputFL - 1) for unsigned input.

To view the LumpLatency block, click the ⇩ icon on the block.

Version History

Introduced in R2020b