Simulation tool

Simulator for running generated test benches

Model Configuration Pane: Test Bench

Description

Simulator where you run the generated test benches. The tool generates a script to build and run your HDL code and test bench.

Make sure that the system selected is the DUT. This option is disabled if you select the entire model.

Mentor Graphics ModelSim (default) | Cadence Incisive | Xilinx Vivado Simulator | Custom | Synopsys VCS

Mentor Graphics ModelSim: This option is the default. HDL Coder™ generates the selected types of test benches for use with Mentor Graphics^® ModelSim™.
Cadence Incisive: The coder generates the selected types of test benches for use with Cadence Incisive^®.
Xilinx Vivado Simulator: The coder generates the selected types of test benches for use with Xilinx^® Vivado^® simulator.
Custom: Selecting this option enables the custom script options on the EDA Tool Scripts pane.
Synopsys VCS: This simulator is supported only for SystemVerilog DPI test bench.

To set this property, use hdlset_param or makehdltb. To view the property value, use hdlget_param.

No recommendations.

Parameter: SimulationTool (HDL test bench) | GenerateCosimModel (cosimulation) | GenerateSVDPITestbench | (SystemVerilog DPI test bench)

Type: character vector

SimulationTool Values: 'Mentor Graphics ModelSim' | 'Cadence Incisive' |

'Xilinx Vivado
                    Simulator'

| 'Custom'

'Synopsys
                    VCS'

SimulationTool Default: 'Mentor Graphics ModelSim'

GenerateCosimModel Values: 'ModelSim' | 'Incisive' | 'Vivado Simulator' | 'None'

GenerateCosimModel Default: 'ModelSim'

GenerateSVDPITestbench Values: 'ModelSim' | 'Incisive' | 'Custom' | 'Synopsys VCS' | 'Vivado'

GenerateSVDPITestbench Default: 'ModelSim'

Introduced in R2017a