Use synthesis estimates for distributed pipelining

Use synthesis timing estimates to guide pipeline register insertion

Since R2022a

Model Configuration Pane: Optimization / Pipelining

Description

To determine more accurate propagation delays for each component, use synthesis timing estimates for distributed pipelining. Different weights are assigned to varying components, which more accurately reflects how the components function on hardware. When you enable this parameter, HDL Coder™ can better distribute pipelines in your design for HDL code generation and hardware deployment to maximize the clock frequency for your target device.

Dependencies

Distributed pipelining must be enabled for at least one subsystem in your model to use this parameter.

Settings

Off (default) | On
On

Use synthesis timing estimates for calculating propagation delays for each component in your design for distributed pipelining.

Off

Use equal weights for calculating propagation delays for each component in your design for distributed pipelining.

Tips

To set this property, use the functions hdlset_param or makehdl. To view the property value, use the function hdlget_param.

For example, you can enable the UseSynthesisEstimatesForDistributedPipelining setting when you generate HDL code for the symmetric_fir subsystem inside the sfir_fixed model by using either of these methods:

  • Pass the property as an argument to the makehdl function.

    makehdl('sfir_fixed/symmetric_fir', ... 
        'UseSynthesisEstimatesForDistributedPipelining','on')

  • When you use hdlset_param, set the parameter on the model, and then generate HDL code by using the makehdl function.

    hdlset_param('sfir_fixed','UseSynthesisEstimatesForDistributedPipelining','on')
makehdl('sfir_fixed/symmetric_fir')

Using synthesis timing estimates for distributed pipelining most effectively minimizes the critical path to maximize the clock frequency for your design when:

  • Your synthesis tool and target hardware have been characterized by using a timing database that HDL Coder supports or by using a timing database that you create by using the genhdltdb function. To see the list of characterized timing databases in HDL Coder, see Critical Path Estimation Without Running Synthesis.

  • If you generate your own timing database, you can use the model parameter TimingDatabaseDirectory to set the timing database for the model to your custom timing database created. See Custom Timing Database Directory.

  • All of the blocks in your design are characterized, meaning the blocks are part of the timing database for each supported target device. See Characterized Blocks.

Recommended Settings

No recommendations.

Programmatic Use

Parameter: UseSynthesisEstimatesForDistributedPipelining
Type: character vector
Value: 'on' | 'off'
Default: 'off'

Version History

Introduced in R2022a

See Also

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