Simulink Design Verifier

R2026b
Identify design errors, prove requirements compliance, and generate tests

Simulink® Design Verifier™ uses formal methods to identify hidden design errors in models. It detects operations in models that result in runtime errors and undesired behaviors, such as integer overflow, dead logic, array access violations, and division by zero. The analysis is distributed across CPU cores to accelerate results for complex models.

Simulink Design Verifier performs formal verification to prove that designs meet functional requirements and do not violate safety requirements. Formal analysis also verifies requirements for consistency and completeness. For each design error or requirement violation, the software generates a simulation test case for debugging.

Using Simulink Design Verifier, you can automatically generate test vectors to achieve model and code coverage. These test vectors drive your model to achieve decision, condition, and modified condition/decision (MC/DC) coverage metrics.

Support for industry standards is available through IEC Certification Kit (for IEC 61508 and ISO 26262) and DO Qualification Kit (for DO-178 and DO-254).

Flowchart illustrating a model-based design analysis process. The diagram is divided into three sections: Inputs, Analysis Modes, and Outputs. The Inputs section shows icons for "Model" and "Requirements." The Analysis Modes section displays icons for "Test Creation," "Design Error Detection," and "Property Proving." The Outputs section shows icons for "Report," "Test Harness," and "Test Manager." Each section is visually separated and labeled at the bottom.

Get Started

Learn the basics of Simulink Design Verifier

Analyze Model and View Results

Select analysis modes, set analysis options, run analysis, and view results

Generate Tests

Generate sets of test cases to achieve model and code coverage and satisfy custom testing criteria

Detect and Address Bugs

Detect run-time errors and logical errors, debug issues in your design

Specify and Verify Design Requirements

Verify design against requirements, refine counterexamples by using input assumptions

Review Analysis Results

Log and review analysis results, generate report, and inspect test cases

Analyze Common Modeling Patterns

Tune calibration parameters and analyze export-function and AUTOSAR models

Resolve Analysis Issues

Handle limitations and use best practices to improve analysis

Tool Qualification and Certification

Qualify Simulink Design Verifier for IEC Certification