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LDPC Decoder

Decode quasi-cyclic low-density parity-check code

Since R2023b

  • LDPC Decoder block

Libraries:
Wireless HDL Toolbox / Error Detection and Correction

Description

The LDPC Decoder block implements a quasi-cyclic low-density parity-check (QC-LDPC) decoder with hardware-friendly control signals. The block accepts log-likelihood ratio (LLR) values and a stream of control signals and outputs decoded bits, a stream of control signals, and a signal that indicates whether the block is ready to accept new inputs.

This block provides an option to implement layered belief propagation with either the normalized min-sum approximation algorithm or the min-sum approximation algorithm. The LDPC Decoder block supports scalar and N-element column vector inputs with a specified parity-check matrix and block size. The block supports the early termination feature to help improve decoding performance and faster convergence speeds at high signal noise ratio (SNR) conditions. The block supports QC-LDPC codes of circulant weight 1.

The block enables decoding of multiple code rates to help achieve high throughput efficiency with a high degree of code rate flexibility. You can use this block to develop a standard-based or generalized receiver that uses a QC-LDPC for forward error correction (FEC) coding. The block provides an architecture suitable for HDL code generation and hardware deployment. For more information, see Algorithms.

Examples

Ports

Input

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Input log-likelihood ratio (LLR) values, specified as a scalar or a column vector of size n, where n must be factor of Block size.

The data type of this input must be a signed fixed-point with a word length in the range [4, 16 ] and fraction length in the range [0, 15 ].

Data Types: int8 | int16 | fixed point

Control signals accompanying the sample stream, specified as a samplecontrol bus. The bus includes the start, end, and valid control signals, which indicate the boundaries of the frame and the validity of the samples.

  • start — Indicates the start of the input frame

  • end — Indicates the end of the input frame

  • valid — Indicates that the data on the input data port is valid

For more details, see Sample Control Bus.

Data Types: bus

Number of iterations, specified as a integer in the range [1, 63].

If you specify iter as a value greater than 63, the block automatically sets the iter value to 8 and performs the decoding operation.

Dependencies

To enable this port, set the Source for number of iterations parameter to Input port.

Data Types: uint8

Output

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Decoded output data bits, returned as a scalar or a column vector of size n.

Data Types: Boolean

Control signals accompanying the sample stream, returned as a samplecontrol bus. The bus includes the start, end, and valid control signals, which indicate the boundaries of the frame and the validity of the samples.

  • start — Indicates the start of the output frame

  • end — Indicates the end of the output frame

  • valid — Indicates that the data on the output data port is valid

For more details, see Sample Control Bus.

Data Types: bus

Actual number of iterations the block takes to decode the output, returned as a scalar.

Dependencies

To enable this port, set the Decoding termination criteria parameter to Early.

Data Types: uint8

Parity check status indicator, returned as a Boolean scalar. The port indicates the status of the parity check after the decoding operation.

  • 0 — Indicates that the parity check failed

  • 1 — Indicates that the parity check passed

Dependencies

To enable this port, select the Enable parity check output port parameter.

Data Types: Boolean

The block sets this signal to 1 when the block is ready to accept the start of the next frame. If the block receives an input start signal while nextFrame is 0, the block discards the frame in progress and begins processing the new data.

For more information, see Using the nextFrame Output Signal.

Data Types: Boolean

Parameters

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Specify a QC-LDPC parity-check matrix of size M-by-N, where M is the number of rows in the parity-check matrix and N is the number of columns in the parity-check matrix. N must be in the range [4, 128]. M must be less than N and must be in the range [3, N–1]. The last M columns of the parity-check matrix must be invertible in GF(2).

To learn more about the supported parity-check matrices, see Parity-Check Matrix.

Specify the block size. The block size must be an integer in the range [2, 512].

Select the type of LDPC decoding algorithm. For more information, see Algorithms.

  • Min-sum — Use this option to select the layered belief propagation algorithm with a min-sum approximation. For more information, see Min-Sum Approximation.

  • Normalized min-sum — Use this option to select the layered belief propagation algorithm with a normalized min-sum approximation. For more information, see Normalized Min-Sum Approximation.

Specify the scaling factor.

Dependencies

To enable this parameter, set the Algorithm parameter to Normalized min-sum.

Select the decoding termination criteria.

  • Max — Terminates decoding when the block reaches the number of iterations specified through the Number of iterations parameter or through the iter input port.

  • Early — Terminates decoding when all of the parity checks are met or when the block reaches the maximum number of iterations specified through the Maximum number of iterations parameter or through the iter input port.

Select the source for specifying the number of iterations.

You can set the number of iterations by using either an input port or a parameter.

  • Select Property to enable either the Number of iterations parameter or the Maximum number of iterations parameter.

  • Select Input port to enable the iter port.

Specify the number of iterations.

Dependencies

To enable this parameter, set the Decoding termination criteria parameter to Max and the Source for number of iterations parameter to Property.

Specify the maximum number of iterations.

Dependencies

To enable this parameter, set the Decoding termination criteria parameter to Early and the Source for number of iterations parameter to Property.

Select this parameter to enable the parityCheck output port to view the status of the parity check.

More About

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Algorithms

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This figure shows the architecture block diagram of the LDPC Decoder block. The Controller block controls the layer and iteration count of the decoding process. The Variable node RAM block stores the variable node (VN) messages, and Check node RAM block stores the check node messages (CN). The Functional Unit block calculates the variable node (VN) messages and check node (CN) messages based on the layered belief propagation and either the normalized min-sum approximation algorithm or the min-sum approximation algorithm. The Termination/Parity check status block calculates the parity checks and provides the parity check status after each iteration.

LDPC Block Architecture

The implementation of the block matches the performance of the function ldpcDecode.

This plot shows the performance of block with a parity check matrix specified for a 4-bit LLR input with a block length of 1120 in Docsis 3.1 standard, and when the Algorithm parameter is set to Min-sum.

LDPC Decoder BER Performance Comparison Min-sum for Docsis 3.1 standard

This plot shows the performance of block with a parity check matrix specified for a 4-bit LLR input with bgn 1 and lifting size 384 in 5G NR standard, and when the Algorithm parameter is set to Min-sum.

LDPC Decoder BER Performance Comparison Min-sum 5G NR standard

References

[1] Gallager, R. “Low-Density Parity-Check Codes.” IEEE Transactions on Information Theory 8, no. 1 (January 1962): 21–28. https://doi.org/10.1109/TIT.1962.1057683.

[2] Hocevar, D.E. “A Reduced Complexity Decoder Architecture via Layered Decoding of LDPC Codes.” In IEEE Workshop On Signal Processing Systems, 2004. SIPS 2004, 107–12. Austin, Texas, USA: IEEE, 2004. https://doi.org/10.1109/SIPS.2004.1363033.

[3] Chen, Jinghu, R.M. Tanner, C. Jones, and Yan Li. "Improved Min-Sum Decoding Algorithms for Irregular LDPC Codes." In Proceedings. International Symposium on Information Theory, 2005. ISIT 2005. https://doi: 10.1109/ISIT.2005.1523374.

Extended Capabilities

Version History

Introduced in R2023b

See Also

Functions

Blocks