[Reference Design] Define and Register Custom Board- Error in Step 4.4

Hi, I have defined and have registered a custom Board as a reference design method (https://it.mathworks.com/help/hdlcoder/examples/define-and-register-custom-board-and-reference-design-for-zynq-workflow.html). The hardware is developed in Vivado Xilinx. Only the last step 4.4 fails! The step 4.3 works and gives me the following log:

Task "Build FPGA Bitstream" successful. Generated logfile: hdl_prj\hdlsrc\schema_1\workflow_task_BuildFPGABitstream.log Running embedded system build outside MATLAB. Please check external shell for system build progress. The generated bitstream file is located at: hdl_prj\vivado_ip_prj\vivado_prj.runs\impl_1\system_top_wrapper.bit Generate an HDL Workflow Command-Line Interface script to program the target device: hdlworkflow_ProgramTargetDevice.m.

While the step 4.4 doesn't work and give me the following problem

Failed Program target FPGA device. Task "Program Target Device" unsuccessful. See log for details. Generated logfile: hdl_prj\hdlsrc\schema_1\workflow_task_ProgramTargetDevice.log Downloading target FPGA device configuration over Ethernet to SD card ... Cannot identify hdl_prj\vivado_ip_prj\vivado_prj.runs\impl_1\system_top_wrapper.bit. No such file or directory.

I note that in the step 4.3 the file system_top_wrapper.bit is present in the directory, while in the step 4.4 the file disappeares! What is the problem? Can you help me? Thank thank thank you.

[Noam Levine]

Which MATLAB release are you using? Which version of Vivado?

Answer 1

[Giacomo]

a solution?

Answer 2

[Giacomo]

news?