Problem with Windows Management Instrumentation while compiling a DSpace program with a FPGA card (RTI Build Error)

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I recently reinstall the following program on a new computer : Matlab 2018a, DSpace release 2018B, Vivado 2018.3
These programs are compatible, all with a correct license and all linked together.
I have already used these programs to create project on a DSpace 1007 card associated with a 5203 card (the card with the FPGA) but on an older computer.
Now, when I try to execute the compilation of the FPGA part (even with really simple project), I get the following error :
"Starting System Generator code generation...
Starting synthesis of System Generator output files...
Exporting build scripts...
Starting FPGA build...
Starting XSG Synthesis
Waiting for XSG Synthesis...
Error in build stage "Waiting for XSG Synthesis..."
------------------------------------------------------------
RTI Build Error
The build process encountered an error with the Windows Management Instrumentation (WMI).
It is possible that WMI performance counters are broken/disabled on your system.
One possible fix is running "lodctr /r" on the windows command prompt.
Please contact your IT administration for further advice on re-enabling performance counters.
------------------------------------------------------------
FPGA build failed.
Elapsed time is 00:00:32."
So it seems to be link to Windows directly (I have Windows 10 Professionnal). I tried to fix WMI problem like repairing performance counters with the commands shown below
cd c:\windows\system32
lodctr /R
cd c:\windows\sysWOW64
lodctr /R
WINMGMT.EXE /RESYNCPERF
And even if the results are successful, I still get the same error message when I try to compile any FPGA project.
This is the first time I get this kind of error and I'm totally stuck to continue my research works.
Thanks in advance for any help

Answers (1)

Stefanie Schwarz
Stefanie Schwarz on 5 Jan 2022
The issue appears to with either Xilinx System Generator or dSPACE RTI. These tools are external to MathWorks.
You may want to reach out to dSPACE and/or Xilinx technical support for further assistance with this issue.

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R2018a

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