Community Profile

photo

Grégory SEABRA


ASSYSTEM

Active since 2015

Followers: 0   Following: 0

Message

Statistics

  • Thankful Level 1

View badges

Feeds

View by

Question


[HDL Coder] How to keep subsystems port names when applying input/output pipelining
Hello, I am currently developping a control algorithm which will be implemented inside a Xilinx Spartan6 FPGA. I generate the...

9 years ago | 1 answer | 0

1

answer

Question


HDL Coder Workflow Advisor timing analysis
Hello! I am currently working on a project for which my task is to develop a control algorithm for a power converter. This alg...

9 years ago | 1 answer | 0

1

answer