Statistics
RANK
174,622
of 293,474
REPUTATION
0
CONTRIBUTIONS
14 Questions
4 Answers
ANSWER ACCEPTANCE
42.86%
VOTES RECEIVED
0
RANK
of 20,032
REPUTATION
N/A
AVERAGE RATING
0.00
CONTRIBUTIONS
0 Files
DOWNLOADS
0
ALL TIME DOWNLOADS
0
RANK
of 148,733
CONTRIBUTIONS
0 Problems
0 Solutions
SCORE
0
NUMBER OF BADGES
0
CONTRIBUTIONS
0 Posts
CONTRIBUTIONS
0 Public Channels
AVERAGE RATING
CONTRIBUTIONS
0 Highlights
AVERAGE NO. OF LIKES
Feeds
Question
Implement Reset in Simulink
Hallo We have an altrea FPGA, we are generating the design using simulink and then use the hdl coder to generate the vhdl cod...
6 years ago | 1 answer | 0
1
answerCascade Filter in HDL Coder
I am using the interpolation filter block from simulink hdl coder library. I have matlab 2014b. I use a serial partition for my ...
7 years ago | 0
Question
Cascade Filter in HDL Coder
Hallo I am trying to make an interpolation filter of 256 Up sampling. But this is too big for the HDL coder to generate the c...
7 years ago | 2 answers | 0
2
answersQuestion
Convert Block : real world value vs stored integer
in the convert block from simulink, there is a option to chose from *real world value vs stored integer values* which will be eq...
7 years ago | 1 answer | 0
1
answerQuestion
CLK_Enable HDL coder
When generating code in HDL coder. it shows the following line in the clock summary enb_1_4_0 : 2x slower than clk_enable w...
7 years ago | 1 answer | 0
1
answerQuestion
Data Loos in a multi rate system in HDL Coder
Hallo So i am designing a multi rate system in Simulink, that is converted to HDL code using the HDL coder. My design consis...
7 years ago | 1 answer | 0
1
answerHDL Coder Clock Summary Explanation
Hallo Tim Thanks for the answer, solves a lot of confusions. One more question, there is a oversampling parameter in the Simu...
7 years ago | 0
Question
HDL Coder Clock Summary Explanation
When i am generating a HDL code using the Simulink HDL coder, on the code generation report i get a clock summary report. And th...
7 years ago | 2 answers | 0
2
answersQuestion
Relationship Between Simulink and FPGA Clock
I am designing my model in Simulink and then download it to the FPGA using the HDL coder. My output has a Fs of 11.28 Mhz and my...
7 years ago | 2 answers | 0
2
answersHDL coder Generated Model and Simulink Model Results Does not Match
Hallo thanks for the answer, but could you please explain the line in bit details, or suggest me a documentation where i could...
7 years ago | 0
Question
HDL coder Generated Model and Simulink Model Results Does not Match
Hallo So i have my model, where 44.1 kHz signal comes in and the output is 11.28 MHz. I am using FIR interpolation filter for...
7 years ago | 2 answers | 0
2
answersQuestion
Feedback Transition to a State in State Flow
<</matlabcentral/answers/uploaded_files/77436/State_Flow.png>> So i want to state 1 the first time with the condition [Rising...
7 years ago | 1 answer | 0
1
answerQuestion
HDL coder Clocking Module
Hallo Can any one explain me how the clocking module works when i am generating HDL code from a simulink model For example l...
7 years ago | 1 answer | 0
1
answerQuestion
HDL Coder Set Target Frequecny
Hallo in the FPGA Turnkey option from HDL coder, there is a option *"1.3 Set Target Frequency"* and it has two sub options *"...
7 years ago | 1 answer | 0
1
answerQuestion
ALTERA DE0-NANO Board Support for HDL Coder
Hallo I have a DE0-NANO development kit ALTERA. I am using MATLAB 2014b and i have a downloaded the ALTERA FPGA board support...
7 years ago | 1 answer | 0
1
answerHow can I trigger a transition depending on an input's rise in Stateflow?
Hallo So i am trying to implement the same thing as discussed here. So for the first point about the work around does it mean...
8 years ago | 0
Question
Difference between int32 and fixed point
I am trying to program a FPGA using MATLAB and the HDL coder. So for the FPGA i need to have fixed point data types. If i am u...
8 years ago | 1 answer | 0
1
answerQuestion
Does Simulink HDL coder support MEX block?
Hallo Everyone I am looking for a list of blocks supported by the Simulink HDL coder, does the HDL coder support blocks gener...
8 years ago | 1 answer | 0