Getting Started

Explore mixed-signal systems examples, videos, and tutorials

The Learner's Guide to Mixed-Signal is designed to help engineers ramp up on modeling mixed-signal systems and Model-Based Design (MBD) as quickly and efficiently as possible. This guide assumes basic familiarity with MATLAB.

Phase 1 is geared towards engineers who are new to mixed-signal modeling in Simulink. For users focusing on in-depth modeling of analog systems and impairment, Phase 2 will guide them to learn more about using Simscape. Phase 3 is specifically targeted towards digital design and HDL code generation. Phase 4 covers aspects of verification such as cosimulation and SystemVerilog module generation.

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Phase 1: Introduction to Mixed-Signal Modeling

2:16
What Is Mixed-Signal Blockset?
Design and simulate analog and mixed-signal systems such as ADCs and PLLs with Mixed-Signal Blockset.

Video

1:55
What Is SerDes Toolbox?
Design SerDes systems and generate IBIS-AMI models for high-speed interconnects such as DDR, PCI Express, and Ethernet using SerDes Toolbox.

Video

2:25
What Is Simscape Electrical?
Model and simulate electronic, mechatronic, and electrical power systems using Simscape Electrical.

Video

1:55
What Is HDL Coder?
Generate VHDL and Verilog code for FPGA and ASIC designs using HDL Coder.

Video

19:41
Top-Down Mixed-Signal Design with MATLAB and Simulink
In this webinar we demonstrate how engineers can build a coherent design flow for mixed-signal design. We illustrate this through demonstrations and case studies from industry.

Video

7:58
PLL Design and Verification Using Data Sheet Specifications Including Phase Noise
Use Mixed-Signal Blockset to model a commercial off-the-shelf integer-N PLL with dual modulus prescaler operating around 4GHz. Verify the PLL performance, including phase noise, lock time, and operating frequency.

Video

25:45
A Mixed-Signal Model-Based Design Flow for Automotive Sensors
Allegro Microsystems explains how they are leveraging MATLAB and Simulink for rapid prototyping, streamlined UVM-based verification, and automatic RTL code generation for mixed signal sensor ICs.

Video
Mixed-Signal Blockset Models
The Mixed-Signal Blockset™ Models provide additional models and examples of typical systems such as PLL, ADC, SerDes, and SMPS highlighting analog/digital integration.

Add-on
Design and Evaluate Simple PLL Model
This example shows how to design a simple PLL using a reference architecture, and validate the PLL using PLL Testbench.

Documentation
Effect of Metastability Impairment in Flash ADC
This example shows how to customize a flash ADC by adding the metastability probability as an impairment and how to measure the said impairment.

Documentation
Signal Processing with Simulink

Instructor-Led Training

Phase 2: Analog Modeling with Simscape

7:53
Applications and Tasks in Simscape Electrical
Design mechatronic systems using Simscape Electrical. An electromechanical actuator and a hybrid electric vehicle show the value of simulation in a design process.

Video

5:11
Simulating in Real Time: Electrical Actuator
Convert a mechatronic actuator model to C code and simulate in a hardware-in-the-loop configuration. Simscape parameters are tuned on the real-time target.

Video
Switched Capacitor Analog to Digital Converter
This example shows how a sigma-delta ADC (analog to digital converter) uses sigma-delta modulation to convert an analog input signal into a digital output signal.

Example
Switching Audio Power Amplifier
Guidelines for getting started in adopting HDL Coder for your design including examples to illustrate selected concepts.

Example
Converting a SPICE Netlist to Simscape Blocks
Guidelines for getting started in adopting HDL Coder for your design including examples to illustrate selected concepts.

Example
Modeling Physical Systems with Simscape
This one-day course focuses on modeling systems in several physical domains and combine them into a multidomain system in the Simulink environment using Simscape.

Instructor-Led Training

Phase 3: Digital Design with HDL Code Generation

5 Videos
FPGA Design with MATLAB (5 Videos)
Watch this five-part video guide to learn about FPGA design with MATLAB. Discover the key factors to consider when targeting a signal-processing algorithm to FPGA or ASIC hardware.

Video

9:19
Generate Floating-Point HDL for FPGA and ASIC Hardware
Generate target-independent synthesizable VHDL or Verilog code directly from single-, double-, or half-precision floating-point models.

Video

30:45
Fixed-Point Made Easy for FPGA Programming
Learn the basic concepts behind fixed-point math, and how to apply this knowledge to implement your design efficiently on FPGA hardware.

Video
Generating HDL Code from Simulink
This two-day course shows how to generate and verify HDL code from a Simulink model using HDL Coder™ and HDL Verifier™.

Instructor-Led Training
DSP for FPGA
This three-day course will review DSP fundamentals from the perspective of implementation within the FPGA fabric.

Instructor-Led Training

Phase 4: Overview of Mixed-Signal Verification

1:48
What Is HDL Verifier?
Verify VHDL and Verilog using HDL simulators and FPGA-in-the-loop test benches with HDL Verifier.

Video

3:50
Generate SystemVerilog DPI for Analog Mixed-Signal Verification
Export analog/mixed-signal Simulink models into your SystemVerilog simulator.

Video

5:35
Import HDL for Cosimulation with Simulink
Use HDL Verifier to import handwritten or legacy VHDL or Verilog for cosimulation with Simulink.

Video

3:27
Cosimulating SPICE Models with Cadence Spectre
Guidelines for getting started in adopting HDL Coder for your design including examples to illustrate selected concepts.

Video

19:36
PLL Design with MATLAB and Simulink
PLL simulations are often slow, lengthening project development time. To speed up PLL design, engineers are using MathWorks tools. These tools model feedback efficiently, allow analog and digital components to be simulated together, and have abstract

Video
Building HDL Test Bench for QAM Transceiver Model
This example shows how to build a behavioral test bench using SystemVerilog DPI-C component generation.

Example

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