Getting Started

Explore mixed-signal systems examples, videos, and tutorials.

These resources provide a path to help engineers ramp up on modeling mixed-signal systems and Model-Based Design (MBD) as quickly and efficiently as possible. The program features a variety of resources including videos, self-paced training, webinars and on-site sessions.

Phase 1 is geared towards people who are new to mixed-signal modeling in Simulink. For users focusing on in-depth modeling of analog systems and impairment, Phase 2 will guide them to learn more about using Simscape. Phase 3 is specifically targeted towards digital design and HDL code generation. Phase 4 covers aspects of verification such as cosimulation and SystemVerilog module generation. Phase 5 provides ongoing support and resources.

To request on-site training, fee-based training or for more information, contact your account manager.

Phase 1: Introduction to Mixed-Signal Modeling

Design and simulate analog and mixed-signal systems such as ADCs and PLLs with Mixed-Signal Blockset.
2:16
What Is Mixed-Signal Blockset?
Design and simulate analog and mixed-signal systems such as ADCs and PLLs with Mixed-Signal Blockset.

Video

Design SerDes systems and generate IBIS-AMI models for high-speed interconnects such as DDR, PCI Express, and Ethernet using SerDes Toolbox.
1:55
What Is SerDes Toolbox?
Design SerDes systems and generate IBIS-AMI models for high-speed interconnects such as DDR, PCI Express, and Ethernet using SerDes Toolbox.

Video

Model and simulate electronic, mechatronic, and electrical power systems using Simscape Electrical.
2:25
What Is Simscape Electrical?
Model and simulate electronic, mechatronic, and electrical power systems using Simscape Electrical.

Video

Generate VHDL and Verilog code for FPGA and ASIC designs using HDL Coder.
1:55
What Is HDL Coder?
Generate VHDL and Verilog code for FPGA and ASIC designs using HDL Coder.

Video

In this webinar we demonstrate how engineers can build a coherent design flow for mixed-signal design. We illustrate this through demonstrations and case studies from industry.
19:41
Top-Down Mixed-Signal Design with MATLAB and Simulink
In this webinar we demonstrate how engineers can build a coherent design flow for mixed-signal design. We illustrate this through demonstrations and case studies from industry.

Video

Use Mixed-Signal Blockset to model a commercial off-the-shelf integer-N PLL with dual modulus prescaler operating around 4GHz. Verify the PLL performance, including phase noise, lock time, and operating frequency.
7:58
PLL Design and Verification Using Data Sheet Specifications Including Phase Noise
Use Mixed-Signal Blockset to model a commercial off-the-shelf integer-N PLL with dual modulus prescaler operating around 4GHz. Verify the PLL performance, including phase noise, lock time, and operating frequency.

Video

Allegro Microsystems explains how they are leveraging MATLAB and Simulink for rapid prototyping, streamlined UVM-based verification, and automatic RTL code generation for mixed signal sensor ICs.
25:45
A Mixed-Signal Model-Based Design Flow for Automotive Sensors
Allegro Microsystems explains how they are leveraging MATLAB and Simulink for rapid prototyping, streamlined UVM-based verification, and automatic RTL code generation for mixed signal sensor ICs.

Video

Mixed-Signal Blockset Models
Mixed-Signal Blockset Models
The Mixed-Signal Blockset™ Models provide additional models and examples of typical systems such as PLL, ADC, SerDes, and SMPS highlighting analog/digital integration.

Add-on

Design and Evaluate Simple PLL Model
Design and Evaluate Simple PLL Model
This example shows how to design a simple PLL using a reference architecture, and validate the PLL using PLL Testbench.

Documentation

Effect of Metastability Impairment in Flash ADC
Effect of Metastability Impairment in Flash ADC
This example shows how to customize a flash ADC by adding the metastability probability as an impairment and how to measure the said impairment.

Documentation

Phase 2: Analog Modeling with Simscape

Design mechatronic systems using Simscape Electrical. An electromechanical actuator and a hybrid electric vehicle show the value of simulation in a design process.
7:53
Applications and Tasks in Simscape Electrical
Design mechatronic systems using Simscape Electrical. An electromechanical actuator and a hybrid electric vehicle show the value of simulation in a design process.

Video

Convert a mechatronic actuator model to C code and simulate in a hardware-in-the-loop configuration. Simscape parameters are tuned on the real-time target.
5:11
Simulating in Real Time: Electrical Actuator
Convert a mechatronic actuator model to C code and simulate in a hardware-in-the-loop configuration. Simscape parameters are tuned on the real-time target.

Video

Switched Capacitor Analog to Digital Converter
Switched Capacitor Analog to Digital Converter
This example shows how a sigma-delta ADC (analog to digital converter) uses sigma-delta modulation to convert an analog input signal into a digital output signal.

Example

Switching Audio Power Amplifier
Switching Audio Power Amplifier
Guidelines for getting started in adopting HDL Coder for your design including examples to illustrate selected concepts.

Example

Modeling Physical Systems with Simscape
Modeling Physical Systems with Simscape
This one-day course focuses on modeling systems in several physical domains and combine them into a multidomain system in the Simulink® environment using Simscape™.

Fee-based training

Phase 3: Digital Design with HDL Code Generation

Use the data type optimization feature in Fixed-Point Designer to find optimal data types for efficient implementation on an FPGA while meeting constraints on the numerical behavior of your system.
2:11
Efficient Fixed-Point Implementation of a Filter on an FPGA
Use the data type optimization feature in Fixed-Point Designer to find optimal data types for efficient implementation on an FPGA while meeting constraints on the numerical behavior of your system.

Video

Learn how to take Signal Processing and Communications designs from floating point to efficient fixed point implementation on FPGAs.
30:34
FPGA for DSP Applications Fixed Point Made Easy
Learn how to take Signal Processing and Communications designs from floating point to efficient fixed point implementation on FPGAs.

Video

This session demonstrates how recent developments in MATLAB and Simulink reduce the cost of developing FPGA and ASIC applications, through strong integration with conventional EDA workflows.
43:00
Design and Verification of FPGA and ASIC Applications
This session demonstrates how recent developments in MATLAB and Simulink reduce the cost of developing FPGA and ASIC applications, through strong integration with conventional EDA workflows.

Video

Generating HDL Code from Simulink
Generating HDL Code from Simulink
This two-day course shows how to generate and verify HDL code from a Simulink® model using HDL Coder™ and HDL Verifier™.

Fee-based training

DSP for FPGAs
DSP for FPGA
This three-day course will review DSP fundamentals from the perspective of implementation within the FPGA fabric.

Fee-based training

Phase 4: Overview of Mixed-Signal Verification

Verify VHDL and Verilog using HDL simulators and FPGA-in-the-loop test benches with HDL Verifier.
1:48
What Is HDL Verifier?
Verify VHDL and Verilog using HDL simulators and FPGA-in-the-loop test benches with HDL Verifier.

Video

Export analog/mixed-signal Simulink models into your SystemVerilog simulator.
3:50
Generate SystemVerilog DPI for Analog Mixed-Signal Verification
Export analog/mixed-signal Simulink models into your SystemVerilog simulator.

Video

Use HDL Verifier to import handwritten or legacy VHDL or Verilog for cosimulation with Simulink.
5:35
Import HDL for Cosimulation with Simulink
Use HDL Verifier to import handwritten or legacy VHDL or Verilog for cosimulation with Simulink.

Video

Cosimulate with the detailed analog simulation in Cadence Spectre .
3:27
Cosimulating SPICE Models with Cadence Spectre
Guidelines for getting started in adopting HDL Coder for your design including examples to illustrate selected concepts.

Video

PLL simulations are often slow, lengthening project development time. To speed up PLL design, engineers are using MathWorks tools. These tools model feedback efficiently, allow analog and digital components to be simulated together, and have abstract
19:36
PLL Design with MATLAB and Simulink
PLL simulations are often slow, lengthening project development time. To speed up PLL design, engineers are using MathWorks tools. These tools model feedback efficiently, allow analog and digital components to be simulated together, and have abstract

Video

Building HDL Test Bench for QAM Transceiver Model
Building HDL Test Bench for QAM Transceiver Model
This example shows how to build a behavioral test bench using SystemVerilog DPI-C component generation.

Example

Phase 5: Ongoing Support

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