Developing Radio Applications for RFSoC with MATLAB & Simulink

In these videos, a MathWorks engineer uses a new Model-Based Design workflow to perform  hardware-software partitioning using the example of a range-Doppler radar algorithm.

  • Capabilities of Xilinx Zynq UltraScale+ RFSoC devices
  • Challenges in hardware/software co-design
  • System architecture simulation with SoC Blockset
  • Overview of range-Doppler radar
  • Developing reference models in Simulink
  • Algorithm elaboration

Part 1: Hardware/Software Co-Design Workflow Target SoC architectures like Xilinx UltraScale+ RFSoC devices using Model-Based Design. Build Simulink models of hardware/software platforms to make design decisions.

Part 2: System Specification and Design System specifications for a range-Doppler radar are the driver for hardware/software implementation decisions when targeting SoC architectures like Xilinx RFSoC devices.

Part 3: Hardware/Software Partitioning Perform simulation and analysis of the SoC architecture of the Xilinx RFSoC to investigate hardware/software partitioning of the range-Doppler radar algorithm.

Part 4: Code Generation and Deployment Use SoC Blockset to automate the process of C and HDL code generation from Simulink models, and to automatically deploy the range-Doppler radar algorithm to a Xilinx ZCU111 development kit.