Distributed pipelining
Enable pipeline register distribution
Model Configuration Pane: Optimization / Pipelining
Description
Enable pipeline register distribution, which is a speed optimization that increases the clock speed by moving existing delays in a design to reduce the critical path. This optimization moves the delays within a subsystem while preserving the hierarchy. For more information, see Distributed Pipelining.
Dependencies
Your design must contain delays that can be redistributed. You can insert delays manually or by using the HDL block properties InputPipeline or OutputPipeline on a subsystem or block.
Settings
Off
(default) | On
On
Distribute pipelines in your design. To distribute pipelines, you must have pipelines already specified in your design.
Off
Do not distribute pipelines in your design.
Tips
To set this property, use the functions hdlset_param
or makehdl
. To view the property value, use
the function hdlget_param
.
For example, you can use the DistributedPipelining
setting when you generate HDL code for the symmetric_fir
subsystem inside the sfir_fixed
model using either of these methods:
Pass the property as an argument to the
makehdl
function.makehdl('sfir_fixed/symmetric_fir', ... 'DistributedPipelining','on')
When you use
hdlset_param
, set the parameter on the model and then generate HDL code by using themakehdl
function.hdlset_param('sfir_fixed','DistributedPipelining','on') makehdl('sfir_fixed/symmetric_fir')
Recommended Settings
No recommendations.
Programmatic Use
Parameter: DistributedPipelining |
Type: character vector |
Value: 'on' | 'off' |
Default: 'off' |
Version History
Introduced in R2012a