How set block parameter over Zynq AXIS Lite bus?

I need to change some parameters inside HDL Coder blocks during the execution (for example the value of the costant, HDL Counter, Compare To Constant,...) with the AXI4-Lite bus after the creation of the IP Core for Vivado. How can i do it? maybe with the ExportedGlobal declaration for the variables used?

Answer 1

[Kiran Kintali]

https://www.mathworks.com/help/hdlcoder/ug/generate-code-for-tunable-parameters.html

Generate DUT Ports for Tunable Parameters

Tunable parameters that you use to adjust your model behavior during simulation can map to top-level DUT ports in your generated HDL code. HDL Coder™ generates one DUT port per tunable parameter.

You can generate a DUT port for a tunable parameter by using it in one of these blocks:

• Gain
• Constant
• MATLAB Function
• MATLAB System
• Chart
• Truth Table
• State Transition Table

These blocks with the tunable parameter can be at any level of the DUT hierarchy, including within a model reference.

[Luk McCregor]

Thanks!