MATLAB stuck when HDL coder converted the model to Verilog

After clicking henerate HDL code to run, the operation page is directly stuck and no operation can be carried out. MATLAB can only be forcibly closed. And no Verilog was produced。
If I close MATLAB directly, the following error report will appear. But if I wait for it to run, MATLAB will jam.
So when I changed the output to multiple parallel structures, and I continued to run henerate HDL code, the program, just like it did before, just stuck. Continue to close MATLAB, at this time a new error.
error:Compilation errors when generating code for: Matrix/jvzhen\Selector1 Error during MATLAB code compilation: Error Path: B:\matlab\src\cgir_hdl\emlinterface\EMLInterfaceForHDL.cpp:407 Error Location: (@Row: --> 5 @Column: --> 14) Compilation aborted by user. Internal Error: This error occurred inside a MathWorks function.

Answers (1)

Can you share your model or reach out to tech support for further guidance on the topic?
In general this model seems to be using large matrices at the IO. You have two options.
  • Manual frame to sample conversion; reduce the IO usage by passing samples into the dut; use additional valid, ready signals to control the IO frames.
mlhdlc_demo_setup('heq')
  • Use to automated frame to sample conversion workflow

10 Comments

thanks,sir.
The value of m and n is 512 and the data type is unit32.
Sir ,Have you solved the problem?
Feel free to reach out with a model for additional recommendations.
I still don't know how to solve this problem.sir
Please reach out to MathWorks support with reproduction steps. The model does not compile.
Error using slhdlcoder.SimulinkConnection/initModel
Invalid setting in 'jvzhen/unit8Fcn' for parameter 'm'
sry,sir.Maybe I didn't give you enough information。
This is the part of the m file I ran, and then I used the Simulink model to produce the matrix.I chose this picture.
The problem is that the program runs for a long time, around 10 hours, and 3.2genereteRTL is still reporting an error and running out of memory
clear;clc;
u = 1;
v = 2;
w = 3;
kernel = 9;
layer = 2;
img_path = '../picture/sssna.jpeg';
[img, m, n, lambd] = system2(img_path);
save lambd lambd
system1
function [U, V, W, X] = system1(U,V,W,n)
for i = 1:50
U = mod(15*U, 251);
V = mod(14*V, 241);
W = mod(11*W, 239);
end
for i = 1:n
U = mod(15*U, 251);
V = mod(14*V, 241);
W = mod(11*W, 239);
X(i) = mod(U+V+W, 256);
end
end
system2(img_path)
function [img,m,n,lambd] = system2(img_path)
I = imread(img_path);
img = I(:, :, 1);
[m, n] = size(img);
m = fi(m,0,32,0);
n = fi(n,0,32,0);
encrypts = hash(img, 'sha1');
for i = 1:20
lambd(i) = hex2dec(encrypts(2*i-1:2*i));
end
lambd = fi(lambd,0,32,0);
end
sir,I hope you can help me.
I have the same problem as I use the CIC decimation HDL optimized simulink block in my model. Since this block only accepts vectorized data as input, if the user sets the decimation factor to 20 the HDL coder gets stuck in the VHDL code generation.
you wrote"Manual frame to sample conversion; reduce the IO usage by passing samples into the dut; use additional valid, ready signals to control the IO frames" I could not find a way to apply a manual frame to sample conversion in combination with CIC decimation HDL optimized Simulink block
The automatic I/O optimization and frame-to-sample conversion are introduced in R2022b and R2023 and I'm using R2021a.
Any comment is highly appreciated.
Kind regards
Arash
Arash, Would you be able to share a sample model? Thanks.
wang, I hope you got MathWorks tech support on your thread; my initial comment still applies. You can browse examples like >> mlhdlc_demo_setup('heq') to see how to convert your code to streaming fashion.

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Release

R2021b

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Asked:

on 22 Feb 2023

Edited:

on 20 Nov 2023

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