Adopting Model-Based Design for FPGA, ASIC, and SoC Development
Get started with algorithm and digital hardware design and verification collaborating to explore implementation options, verify earlier, and generate verification components.
Videos
Learn the essentials of MATLAB through this free, two-hour introductory tutorial on commonly used features and workflows.
Interactive Online Training
Learn the basics of how to create, edit, and simulate models in Simulink with this free, three-hour introductory tutorial.
Interactive Online Training
This three-day course provides a comprehensive introduction to the MATLAB technical computing environment.
Interactive Online or Instructor-Led Training
This two-day course is for engineers who are new to system and algorithm modeling and design validation in Simulink.
Instructor-Led training
Learn about Model-Based Design and how to use Simulink to create block diagrams and simple models.
Documentation
FPGA Design with MATLAB (5 videos)
Watch this five-part video guide to learn about FPGA design with MATLAB. Discover the key factors to consider when targeting a signal-processing algorithm to FPGA or ASIC hardware.
Video
Using HDL Coder WFA to implement a distortion effect
This tutorial shows how to design and implement an audio signal processing algorithm on FPGA hardware using HDL Coder.
Blog Post
FPGA for DSP Applications: Fixed Point Made Easy
Learn how to take signal processing and communications designs from floating point to efficient fixed-point implementation on FPGAs.
Recorded webinar
Generate Floating-Point HDL for FPGA and ASIC Hardware
Generate target-independent synthesizable VHDL or Verilog code directly from single-, double-, or half-precision floating-point models.
Video demonstration
Model-Based FPGA and ASIC Design in the Context of Functional Safety
How to design and implement signal processing, control design, and vision algorithms on FPGA, ASIC and SoC while adhering to functional safety standards such as ISO 26262, IEC 61508 or IEC 62304.
Video
HDL Coder Self-Guided Tutorial
This tutorial will guide you through the steps necessary to implement a MATLAB algorithm in FPGA hardware.
Document and examples
Methodology Guide for Learning and Evaluating HDL Coder
These guidelines will help you adopt HDL Coder for your design and include examples to illustrate selected concepts.
Document and examples
This three-day course will review DSP fundamentals from the perspective of implementation within the FPGA fabric.
Instructor-Led training
Generating HDL Code from Simulink
This two-day course shows how to generate and verify HDL code from a Simulink model using HDL Coder and HDL Verifier.
Instructor-Led training
Learn how to generate VHDL and Verilog code for FPGA programming or ASIC prototyping and design.
Documentation
Hardware Implementation of High-Performance FFT Algorithms on FPGAs
Using the inbuilt block parameters of the DSP HDL Toolbox FFT block, engineers can quickly explore architecture implementations, simulate hardware latency, and stream incoming data in sample- or frame-based processing to meet high-speed requirements.
Video
FPGA, ASIC, and SoC Development with MATLAB and Simulink
Learn how high-level design in MATLAB and Simulink allows you to shorten the design and verification time on ASIC and FPGA projects. HDL Coder provides this design environment and HDL Verifier links to industry-leading verification tools for design v
Video
MATLAB-to-SystemC Workflow for Cadence Stratus HLS
Learn how to produce ASIC-optimized implementations of MATLAB code using HDL Coder. Generate synthesizable, fixed-point SystemC code with a SystemC testbench for use with the Cadence Stratus HLS high-level synthesis tool.
Video
From Algorithms to FPGA / ASIC Implementation with MATLAB and Simulink
Learn about the high-level design of FPGAs and ASIC with MATLAB and Simulink through live demonstrations using HDL Coder. The demonstration covers a step-by-step process from initial models, hardware construct incorporation, and RTL code generation.
Video
Improve RTL Verification by Connecting to MATLAB
Generate SystemVerilog DPI components to speed verification environment creation, debug issues with cosimulation between MATLAB or Simulink and HDL simulation, and learn how to eliminate bugs much earlier through broader collaboration.
Recorded webinar
Generating DPI-C Models from MATLAB Using HDL Verifier
Generate a SystemVerilog DPI-C reference model for use in UVM simulation from MATLAB using HDL Verifier.
Video demonstration
Generate SystemVerilog DPI for Analog Mixed-Signal Verification
Export analog/mixed-signal Simulink models into your SystemVerilog simulator.
Video
Import HDL for Cosimulation with Simulink
Use HDL Verifier to import handwritten or legacy VHDL or Verilog for cosimulation with Simulink.
Video demonstration
Using FPGA Data Capture to debug a design
This tutorial shows how to insert functionality to extract data from an FPGA prototype for debugging in MATLAB and Simulink.
Blog post
MATLAB as AXI Master with Xilinx FPGA and Zynq SoC Boards
MATLAB as AXI Master in HDL Verifier provides read/write access to on-board memory locations on Xilinx® FPGA and Zynq® SoC boards from a MATLAB session. See how it’s used to control an IP core generated by HDL Coder.
Video demonstration
Learn how to test and verify Verilog and VHDL designs for FPGAs, ASICs, and SoCs using HDL simulators and FPGA boards.
Documentation
ASIC Testbench for HDL Verifier
ASIC Testbench for HDL Verifier is an add-on that enables HDL Verifier to generate testbench components from MATLAB or Simulink into Universal Verification Methodology (UVM) or SystemVerilog environments.
Documentation
Export UVM and SystemVerilog testbenches from MATLAB and Simulink to ASIC/FPGA production environments for Cadence, Siemens, Synopsys, and AMD simulators.
Video
Modeling and Simulation | Designing a Datapath from an FPGA to a Processor with SoC Blockset
Use SoC Blockset to design and simulate applications with FPGA and processor algorithms and memory interfaces before deploying to hardware.
Videos
Software-Defined Radio using MATLAB and Simulink
Learn about capturing and processing wireless data in real time using MATLAB and Software Defined Radio (SDR) platforms.
Recorded webinar
Developing Radio Applications for RFSoC with MATLAB and Simulink (4 videos)
See how to design and implement a range-Doppler radar on the Xilinx Zynq UltraScale+ RFSoC platform. Simulate the effects of accessing external memory and task scheduling, then verify behavior with code generation and deployment.
Video
Vision Processing for FPGA (5 videos)
Learn the considerations, workflow, and techniques for targeting a vision processing algorithm to FPGA hardware.
Video series
Deploying Deep Learning on Embedded Devices - When FPGAs Make Sense
Learn how to design deep learning, computer vision, and signal processing applications and deploy to Xilinx Zynq FPGAs, NVIDIA GPUs, and CPUs. Prototype deep learning networks in your FPGA-based applications with the new MATLAB based workflow.
Video
Certification of a Flight Control System Implemented on an SoC
Learn how you can use Model-Based Design to develop a flight control system involving software (C code) and an FPGA (HDL code) implemented on an SoC (system on a chip).
Video
CPU, FPGA, and I/O Solutions for Real-Time Simulation and Testing with Simulink
The goal of the webinar is to provide an overview of the real-time simulation and testing (RTST) solution from MathWorks and Speedgoat for RCP/HIL. Take your control design from a desktop simulation and test it in real time with hardware and I/O.
Recorded webinar
FPGA-based Hardware-in-the-Loop (HIL) Simulation for Power Electronics
Learn how HDL Coder can implement a Simscape model in HDL code for Hardware-in-the-Loop testing on an FPGA in a Speedgoat real-time target machine.
Recorded webinar
Programming AMD Zynq SoCs with MATLAB and Simulink
This hands-on, two-day course focuses on developing and configuring models in Simulink and deploying on AMD Zynq-7000 All Programmable SoCs.
Instructor-Led training
Software-Defined Radio with Zynq using Simulink
This hands-on, one-day course focuses on modeling designs based on software-defined radio in MATLAB and Simulink and configuring and deploying on the ADI RF SOM.
Instructor-Led training
Why Use FPGAs for Motor Control
Learn why motor control engineers are considering FPGAs and SoCs for their next design and how they are using Simulink to accomplish this with minimal to no FPGA programming.
Video demonstration
Ongoing Support
Learn how you can use MATLAB and Simulink products in your workflow at a free seminar in your area
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